Datasheet ADXL375 (Analog Devices) - 8

SCL/SCLK VDD I/O 1 14 13 SDA/SDI/SDIO GND 2 12 SDO/ALT ADDRESS RESERVED 3 11 RESERVED +X GND 4 10 NC +Y +Z GND 5 9 INT2 VS 6 7 8 INT1 CS
FIGURE 2. Terminal connections.
Pin No. Mnemonic Description
1 VDD I/O Digital Interface Supply Voltage. 2 GND Ground. This pin must be connected to ground. 3 RESERVED Reserved. This pin must be connected to VS or left open. 4 GND Ground. This pin must be connected to ground. 5 GND Ground. This pin must be connected to ground. 6 VS Supply Voltage. 7 C�S �� Chip Select. 8 INT1 Interrupt 1 Output. 9 INT2 Interrupt 2 Output. 10 NC Not Internally Connected. 11 RESERVED Reserved. This pin must be connected to ground or left open. 12 SDO/ALT ADDRESS SPI 4-Wire Serial Data Output (SDO)/I2C Alternate Address Select (ALT ADDRESS). 13 SDA/SDI/SDIO I2C Serial Data (SDA)/SPI 4-Wire Serial Data Input (SDI)/SPI 3-Wire Serial Data Input and Output (SDIO). 14 SCL/SCLK I2C Serial Communications Clock (SCL)/SPI Serial Communications Clock (SCLK). FIGURE 3. Terminal function.
DLA LAND AND MARITIME
SIZE CODE IDENT NO. DWG NO.
COLUMBUS, OHIO A 16236 V62/18612
REV PAGE 8 Document Outline DESCRIPTION REV REV PMIC N/A TITLE SIZE A V62/18612 REV