ADP5070Data SheetParameterSymbolMinTypMaxUnitTest Conditions/Comments INVERTING REGULATOR Reference Voltage VREF 1.60 V Reference Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Voltage VREF − VFB2 0.8 V Feedback Voltage Accuracy −0.5 +0.5 % TJ = 25°C −1.5 +1.5 % TJ = −40°C to +125°C Feedback Bias Current IFB2 0.1 µA Overvoltage Protection Threshold VOV2 0.74 V At FB2 pin after soft start has completed Load Regulation ∆(V 1 REF − VFB2)/ 0.0004 %/mA ILOAD2 = 5 mA to 75 mA ILOAD2 Line Regulation ∆(V 1 REF − VFB2)/ 0.003 %/V VPVIN2 = 2.85 V to 14.5 V, ILOAD2 = 15 mA VPVIN2 EA Transconductance gM2 270 300 330 µA/V Power FET On Resistance RDS (ON) INVERTER 350 mΩ Power FET Maximum Drain Source VDS (MAX) INVERTER 39 V Voltage Current-Limit Threshold ILIM (INVERTER) 600 660 720 mA Minimum On Time 60 ns Minimum Off Time 50 ns SOFT START Soft Start Timer for Boost and Inverting tSS 4 ms SS = open Regulators 32 ms SS resistor = 50 kΩ to GND Hiccup Time tHICCUP 8 × tSS ms THERMAL SHUTDOWN Threshold TSHDN 150 °C Hysteresis THYS 15 °C 1 ILOADx is the current through a resistive load connected across the output capacitor (where x is 1 for the boost regulator load and 2 for the inverting regulator load). Rev. D | Page 4 of 27 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PWM MODE PSM MODE UNDERVOLTAGE LOCKOUT (UVLO) OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATORS PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION THERMAL SHUTDOWN START-UP SEQUENCE APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL COMPONENT SELECTION Feedback Resistors Output Capacitors Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator LOOP COMPENSATION Boost Regulator Inverting Regulator COMMON APPLICATIONS SUPER LOW NOISE WITH OPTIONAL LDOS SEPIC STEP-UP/STEP-DOWN OPERATION LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE