Datasheet ADP5073 (Analog Devices) - 5
| Hersteller | Analog Devices |
| Beschreibung | 1.2 A, DC-to-DC Inverting Regulator |
| Seiten / Seite | 17 / 5 — Data Sheet. ADP5073. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table … |
| Revision | A |
| Dateiformat / Größe | PDF / 514 Kb |
| Dokumentensprache | Englisch |
Data Sheet. ADP5073. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 3. Parameter. Rating. Table 4. Thermal Resistance
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Data Sheet ADP5073 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Rating
θJA and ΨJT are based on a 4-layer printed circuit board (PCB) PVIN, AVIN −0.3 V to +18 V (two signals and two power planes) with thermal vias connecting SW PVIN − 40 V to PVIN + 0.3 V the exposed pad to a ground plane as recommended in the GND −0.3 V to +0.3 V Layout Considerations section. θJC is measured at the top of the VREG −0.3 V to lower of AVIN + 0.3 V or +6 V package and is independent of the PCB. The ΨJT value is more EN, FB, SYNC/FREQ, PWRGD −0.3 V to +6 V appropriate for calculating junction to case temperature in the COMP, SLEW, SS, VREF −0.3 V to VREG + 0.3 V application. Operating Junction −40°C to +125°C
Table 4. Thermal Resistance
Temperature Range
Package Type θ
Storage Temperature −65°C to +150°C
JA θJC ΨJT Unit
Range 16-Lead LFCSP 75.01 55.79 0.95 °C/W Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 5 of 17 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PWM MODE SKIP MODE UNDERVOLTAGE LOCKOUT (UVLO) OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATORS PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION POWER GOOD THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection Loop Compensation COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet ADP5073 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Rating
θJA and ΨJT are based on a 4-layer printed circuit board (PCB) PVIN, AVIN −0.3 V to +18 V (two signals and two power planes) with thermal vias connecting SW PVIN − 40 V to PVIN + 0.3 V the exposed pad to a ground plane as recommended in the GND −0.3 V to +0.3 V Layout Considerations section. θJC is measured at the top of the VREG −0.3 V to lower of AVIN + 0.3 V or +6 V package and is independent of the PCB. The ΨJT value is more EN, FB, SYNC/FREQ, PWRGD −0.3 V to +6 V appropriate for calculating junction to case temperature in the COMP, SLEW, SS, VREF −0.3 V to VREG + 0.3 V application. Operating Junction −40°C to +125°C
Table 4. Thermal Resistance
Temperature Range
Package Type θ
Storage Temperature −65°C to +150°C
JA θJC ΨJT Unit
Range 16-Lead LFCSP 75.01 55.79 0.95 °C/W Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum
ESD CAUTION
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. A | Page 5 of 17 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PWM MODE SKIP MODE UNDERVOLTAGE LOCKOUT (UVLO) OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATORS PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION POWER GOOD THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Capacitor VREG Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection Loop Compensation COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE