Datasheet LTM4651 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | EN55022B Compliant 58V, 24W Inverting-Output DC/DC μModule Regulator |
| Seiten / Seite | 36 / 10 — PIN FUNCTIONS TEMP– (J2, J7):. NC (A6 – 7, B2, B6 – 7, C1, C6 – 7, D6 – … |
| Revision | A |
| Dateiformat / Größe | PDF / 2.2 Mb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS TEMP– (J2, J7):. NC (A6 – 7, B2, B6 – 7, C1, C6 – 7, D6 – 7, E6 – 7, F6 – 7,
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LTM4651
PIN FUNCTIONS TEMP– (J2, J7):
Temperature Sensor, Negative Input. with a thin trace to a local test point to monitor switching Collector and base of a 2N3906-genre PNP bipolar junc- action of the converter, if desired, but do not route near any tion transistor (BJT). Optionally interface to temperature sensitive signals; otherwise, leave electrically open circuit. monitoring circuitry such as LTC2997, LTC2990, LTC2974
NC (A6 – 7, B2, B6 – 7, C1, C6 – 7, D6 – 7, E6 – 7, F6 – 7,
or LTC2975. Otherwise leave electrically open. Pins J2
G6 – 7, H6 – 7, K6 – 7, L6 – 7):
No Connect Pins, i.e., Pins and J7 are electrically connected together internal to the with No Internal Connection. The NC pins predominantly LTM4651, and thus it is only necessary to connect one serve to provide improved mounting of the module to the TEMP– pin to monitoring circuitry. The remaining TEMP– board. In one’s layout, NC pins are permitted to remain pin can be used for redundant connectivity or routed to an electrically unconnected or can be connected as desired, ICT test point for design-for-test considerations, as desired. e.g., connected to a V – OUT plane for heat-spreading pur-
SW (H4):
Switching Node of Switching Converter Stage. poses and/or to facilitate routing. Used for test purposes. May be routed a short distance
SIMPLIFIED BLOCK DIAGRAM
RUN: 1Ω SV NC IN VIN >1.2V 3.6V TYP = ON + <1.07V 0.1μF 400nH TO 58V TYP = OFF V I IN CINH C SVIN INL RUN V – OUT (REFERRED TO GND) CINOUT* CLKIN POWER CONTROL VD (REFERRED AND ANALOG CIRCUITS C C V – D DGND* TO GND) OUT 4.7μF 0.1μF TO CURRENT COMPARATORS, M ×2 T SW PWM AND FET DRIVERS EXTVCC 4μH PGND 50μA ISETa M IL B ISETb COMP BUFFER 0.1μF COMPa + GNDSNS LOAD-LOCAL COMPb – MLCCs (HIGH- ERROR (CENTRALLY FREQUENCY 10nF 1.5nF 10pF AMPLIFIER LOCATED PNP COUTH LOAD DECOUPLING) R TEMP SENSOR) ISET = | VOUT – | V – 50µA 50Ω OUT V – OUT R UP TO 0A ISET DOWN TO (V INTV IN–58V), CC I – SVOUT SV – NO EXCEEDING 26V OUT 1µF BELOW PGND V – OUT PGOOD VINREG + (REFERRED HI-Z WHEN TO GND) – – VPGDFB – SVOUT IS WITHIN 400kHz DEFAULT 0.6V ±7.5% fSET + PGDFB R – 2V PGOOD PGDFB LOGIC 249k 100Ω 220pF 4.99k TEMP+ SV – OUT TEMP– *C GND INOUT and CDGND OPTIONAL, FOR REDUCED RADIATED EMI. SEE FIGURES 5 THROUGH 8. 4651 BD Rev. A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Test Circuit Decoupling Requirements Operation Applications Information Typical Applications Package Photograph Package Description Typical Application Related Parts
PIN FUNCTIONS TEMP– (J2, J7):
Temperature Sensor, Negative Input. with a thin trace to a local test point to monitor switching Collector and base of a 2N3906-genre PNP bipolar junc- action of the converter, if desired, but do not route near any tion transistor (BJT). Optionally interface to temperature sensitive signals; otherwise, leave electrically open circuit. monitoring circuitry such as LTC2997, LTC2990, LTC2974
NC (A6 – 7, B2, B6 – 7, C1, C6 – 7, D6 – 7, E6 – 7, F6 – 7,
or LTC2975. Otherwise leave electrically open. Pins J2
G6 – 7, H6 – 7, K6 – 7, L6 – 7):
No Connect Pins, i.e., Pins and J7 are electrically connected together internal to the with No Internal Connection. The NC pins predominantly LTM4651, and thus it is only necessary to connect one serve to provide improved mounting of the module to the TEMP– pin to monitoring circuitry. The remaining TEMP– board. In one’s layout, NC pins are permitted to remain pin can be used for redundant connectivity or routed to an electrically unconnected or can be connected as desired, ICT test point for design-for-test considerations, as desired. e.g., connected to a V – OUT plane for heat-spreading pur-
SW (H4):
Switching Node of Switching Converter Stage. poses and/or to facilitate routing. Used for test purposes. May be routed a short distance
SIMPLIFIED BLOCK DIAGRAM
RUN: 1Ω SV NC IN VIN >1.2V 3.6V TYP = ON + <1.07V 0.1μF 400nH TO 58V TYP = OFF V I IN CINH C SVIN INL RUN V – OUT (REFERRED TO GND) CINOUT* CLKIN POWER CONTROL VD (REFERRED AND ANALOG CIRCUITS C C V – D DGND* TO GND) OUT 4.7μF 0.1μF TO CURRENT COMPARATORS, M ×2 T SW PWM AND FET DRIVERS EXTVCC 4μH PGND 50μA ISETa M IL B ISETb COMP BUFFER 0.1μF COMPa + GNDSNS LOAD-LOCAL COMPb – MLCCs (HIGH- ERROR (CENTRALLY FREQUENCY 10nF 1.5nF 10pF AMPLIFIER LOCATED PNP COUTH LOAD DECOUPLING) R TEMP SENSOR) ISET = | VOUT – | V – 50µA 50Ω OUT V – OUT R UP TO 0A ISET DOWN TO (V INTV IN–58V), CC I – SVOUT SV – NO EXCEEDING 26V OUT 1µF BELOW PGND V – OUT PGOOD VINREG + (REFERRED HI-Z WHEN TO GND) – – VPGDFB – SVOUT IS WITHIN 400kHz DEFAULT 0.6V ±7.5% fSET + PGDFB R – 2V PGOOD PGDFB LOGIC 249k 100Ω 220pF 4.99k TEMP+ SV – OUT TEMP– *C GND INOUT and CDGND OPTIONAL, FOR REDUCED RADIATED EMI. SEE FIGURES 5 THROUGH 8. 4651 BD Rev. A 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Test Circuit Decoupling Requirements Operation Applications Information Typical Applications Package Photograph Package Description Typical Application Related Parts