Datasheet XDPL8210 (Infineon) - 9

HerstellerInfineon
BeschreibungDigital Flyback Controller IC
Seiten / Seite50 / 9 — XDPL8210 Digital Flyback Controller IC. XDP™ Digital Power. Functional …
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XDPL8210 Digital Flyback Controller IC. XDP™ Digital Power. Functional description. 3.1.2. Multimode operation. QRM1. DCM. ABM

XDPL8210 Digital Flyback Controller IC XDP™ Digital Power Functional description 3.1.2 Multimode operation QRM1 DCM ABM

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XDPL8210 Digital Flyback Controller IC XDP™ Digital Power Functional description 3.1.2 Multimode operation
In regulated mode, there are three different switching modes (
QRM1
,
DCM
and
ABM
). The integrated primary side control loop selects the switching mode depending on the operating condition. Power ton,max Pmax On-time controlled QRM1 ton,min (Vin) fsw,max or fsw,QR1, whichever is lower Frequency controlled DCM fsw,min,DCM Pmin,DCM fsw,min,DCM/fline/2 Pulse number controlled ABM Pmin,ABM NABM,min Input Voltage VinUV VinOV
Figure 6 Multimode operation scheme

QRM1
: This mode minimizes the switching loss by switching on the MOSFET at the quasi-resonant 1st valley of the primary auxiliary winding voltage VAUX signal, to maximize the efficiency. The power is controlled by regulating the on-time of the MOSFET. VGD time ton V t AUX sw,QR1 Zero crossing detection 0 V time Valley switching
Figure 7 Switching waveforms in QRM1
Note: If the quasi-resonant 1st valley switching period tsw,QR1 is lower than the minimum switching period of 1/fsw,max, the MOSFET can only be switched on after the quasi-resonant 1st valley. •
DCM
: This mode minimizes the switching loss by reducing the switching frequency when the output power is reduced. The on-time is kept at the minimum value, while the power is controlled by regulating the switching frequency. The minimum power transfer in
DCM
Pmin,DCM happens when the minimum switching frequency fsw,min is reached. Datasheet 9 Revision 1.0 2019-04-26 Document Outline Features Product validation Potential applications Description Table of contents 1 Pin configuration 2 Functional block diagram 3 Functional description 3.1 Regulated mode 3.1.1 Constant current and limited power set-point 3.1.2 Multimode operation 3.1.3 Control loop initialization 3.2 Configurable gate voltage rising slope at GD pin 3.3 Startup 3.4 Line synchronization 3.5 Input voltage, output voltage and output current estimation 3.5.1 Input voltage estimation 3.5.2 Output voltage estimation 3.5.3 Output current estimation 3.6 Power factor correction 3.7 Dimming control 3.8 Protection features 3.8.1 Primary MOSFET overcurrent protection 3.8.2 Output undervoltage protection 3.8.3 Output overvoltage protection 3.8.4 Transformer demagnetization time shortage protection 3.8.5 Regulated mode peak output overcurrent protection 3.8.6 Minimum input voltage startup check and input undervoltage protection 3.8.7 Maximum input voltage startup check and input overvoltage protection 3.8.8 VCC undervoltage lockout 3.8.9 VCC overvoltage protection 3.8.10 IC overtemperature protection 3.8.11 Other protections 3.8.12 Protection reactions 4 Debug mode 5 List of Parameters 6 Electrical Characteristics and Parameters 6.1 Package Characteristics 6.2 Absolute Maximum Ratings 6.3 Operating conditions 6.4 DC Electrical characteristics 7 Package Dimensions 8 References Revision History Glossary ABM CC CRC DCM ECG EMI FB GUI IC LED LP MCU PC PF PFC PWM QRM1 THD UART USB UVLO Disclaimer