Datasheet ADL5201 (Analog Devices)

Wide Dynamic Range, High Speed, Digitally Controlled VGA Data Sheet ADL5201 FEATURES FUNCTIONAL BLOCK DIAGRAM −11.5 dB to +20 dB gain range SPI WITH FA, PARALLEL WITH LATCH, 0.5 dB ± 0.1 dB step size UP/DOWN INTERFACE VPOS GND PWUP 150 Ω differential input and output 7.5 dB noise figure at maximum gain MODE0, OIP3 > 50 dBm at 200 MHz MODE1 LOGIC −3 dB upper frequency bandwidth of 700 MHz Multiple control interface options VIN+ 0dB TO 31.5dB VOUT+ Parallel 6-bit control interface (with latch) 150Ω +20dB 150Ω VIN– VOUT– Serial peripheral interface (SPI) (with fast attack) Gain up/down mode
001
Wide input dynamic range PM ADL5201
388-
Low power mode option
09 Figure 1.
Power-down control Single 5 V supply operation 24-lead, 4 mm × 4 mm LFCSP package APPLICATIONS Differential ADC drivers High IF sampling receivers High output power IF amplification Instrumentation GENERAL DESCRIPTION
The ADL5201 is a digitally controlled, variable gain, wide band- The ADL5201 is powered on by applying the appropriate logic width amplifier that provides precise gain control, high IP3, and level to the PWUP pin. The quiescent current of the ADL5201 low noise figure. The excellent distortion performance and high is typically 80 mA in low power mode. When configured in high signal bandwidth make the ADL5201 an excellent gain control performance mode for more demanding applications, the quiescent device for a variety of receiver applications. The ADL5201 also current is 110 mA. When powered down, the ADL5201 consumes incorporates a low power mode option that lowers the supply less than 7 mA and offers excellent input-to-output isolation. current. The gain setting is preserved during power-down. For wide input dynamic range applications, the ADL5201 provides Fabricated on an Analog Devices, Inc., high speed SiGe process, a broad 31.5 dB gain range with 0.5 dB resolution. The gain is the ADL5201 provides precise gain adjustment capabilities with adjustable through multiple gain control interface options: parallel, good distortion performance and low phase error. The ADL5201 serial peripheral interface, and up/down. amplifier comes in a compact, thermally enhanced, 24-lead, Incorporating proprietary distortion cancellation techniques, 4 mm × 4 mm LFCSP package and operates over the temperature the ADL5201 achieves an output IP3 of greater than 47 dBm at range of −40°C to +85°C. frequencies approaching 200 MHz for most gain settings.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CHARACTERIZATION AND TEST CIRCUITS THEORY OF OPERATION DIGITAL INTERFACE OVERVIEW PARALLEL DIGITAL INTERFACE SERIAL PERIPHERAL INTERFACE (SPI) Fast Attack UP/DOWN INTERFACE Truth Table LOGIC TIMING CIRCUIT DESCRIPTION BASIC STRUCTURE INPUT SYSTEM OUTPUT AMPLIFIER GAIN CONTROL APPLICATIONS INFORMATION BASIC CONNECTIONS ADC DRIVING LAYOUT CONSIDERATIONS EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK EVALUATION BOARD CONFIGURATION OPTIONS Configuration Options for the Main Section Configuration Options for the USB Section OUTLINE DIMENSIONS ORDERING GUIDE