Datasheet HMC742ALP5E (Analog Devices) - 7

HMC742ALP5E
v01.1213
0.5 dB LSB GaAs MMIC 6-BIT DIGITAL VARIABLE GAIN AMPLIFIER, 70 MHz - 4 GHz Power-Up States PUP Truth Table
If LE is set to logic LOW at power-up, the logic state of Gain Relative to Maximum T LE PUP1 PUP2 PUP1 and PUP2 determines the power-up state of the Gain M part per PUP truth table. If the LE is set to logic HIGH 0 0 0 -31.5 at power-up, the logic state of D0-D5 determines the 0 1 0 -24 power-up state of the part per truth table. The DVGA 0 0 1 -16 L - S latches in the desired power-up state approximately 0 1 1 Insertion Loss 200 ms after power-up. 1 X X 0 to -31.5 dB ITA Note: The logic state of D0 - D5 determines the
Power-On Sequence
IG power-up state per truth table shown below when LE The ideal power-up sequence is: GND, Vdd, digital is high at power-up. inputs, RF inputs. The relative order of the digital inputs are not important as long as they are powered S - D after Vdd / GND R IE
Absolute Maximum Ratings Truth Table
LIF RF Input Power at Max Gain [1] 17.5 dBm (T = +85 °C) Control Voltage Input Gain Relative to P Digital Inputs (Reset, Shift Clock, -0.5 to Vdd +0.5V Maximum Latch Enable & Serial Input) D5 D4 D3 D2 D1 D0 M Gain Bias Voltage (Vdd) 5.6V High High High High High High 0 dB Collector Bias Voltage (Vcc) 5.5V High High High High High Low -0.5 dB IN A Channel Temperature 150 °C High High High High Low High -1 dB A Continuous Pdiss (T = 85 °C) 0.86 W High High High Low High High -2 dB (derate 13.3 mW/°C above 85 °C) [2] High High Low High High High -4 dB Thermal Resistance [3] 75.6 °C/W High Low High High High High -8 dB Storage Temperature -65 to +150 °C LE G Low High High High High High -16 dB Operating Temperature -40 to +85 °C B Low Low Low Low Low Low -31.5 dB ESD Sensitivity (HBM) Class 1A IA Any combination of the above states will provide a reduction in [1] The maximum RF input power increases by the same amount R gain approximately equal to the sum of the bits selected. the gain is reduced. The maximum input power at any state is no A more than 28 dBm. V
Control Voltage Table
[2] This value is the total power dissipation in the amplifier. [3] This is the thermal resistance for the amplifier. State Vdd = +3V Vdd = +5V Low 0 to 0.5V @ <1 µA 0 to 0.8V @ <1 µA High 2 to 3V @ <1 µA 2 to 5V @ <1 µA ELECTROSTATIC SENSITIVE DEVICE
Bias Voltage
OBSERVE HANDLING PRECAUTIONS Vdd (V) Idd (Typ.) (mA) +5.0 2.5 Vs (V) Is (mA) +5.0 150 I F nf o or r p mati r o in cfe ur , d nish e e l d iv b e y r A y a nalo n g d t Devi o p ces i la s c bele o ieve rd d t e o rbs e : H acc iutrtatite e M and ic reli rao bl w e. a H v o e C wever o , nrp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No rd Phoe n r O e: 7 n- 81-li 3 n 2 e a 9-4 t w 70 ww 0 • O . rdh e itt r o it nle i . n co e a m
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