Datasheet AD8336 (Analog Devices) - 4

link to page 21
AD8336 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit1
ABSOLUTE GAIN ERROR2 −0.7 V < VGAIN < −0.6 V 0 1 to 5 6 dB −0.6 V < VGAIN < −0.5 V 0 0.5 to 1.5 3 dB −0.5 V < VGAIN < +0.5 V −1.25 ±0.2 +1.25 dB −0.5 V < VGAIN < +0.5 V, ±3 V ≤ VS ≤ ±12 V ±0.5 +1.25 dB −0.5 V < VGAIN < +0.5 V, −55°C ≤ T ≤ +125°C ±0.5 dB −0.5 V < VGAIN < +0.5 V, preamplifier gain = −3× ±0.5 dB 0.5 V < VGAIN < +0.6 V −4.0 −1.5 to −3.0 0 dB 0.6 V < VGAIN < +0.7 V −9.0 −1 to −5 0 dB GAIN CONTROL INTERFACE Gain Scaling Factor 48 49.9 52 dB/V Intercept Preamplifier + VGA 16.4 dB VGA only 4.5 dB Gain Range 58 60 62 dB Input Voltage (VGAIN) Range No foldover −VS +VS V Input Current 1 μA Response Time 60 dB gain change 300 ns OUTPUT PERFORMANCE Output Impedance, DC to 10 MHz ±3 V ≤ VS ≤ ±12 V 2.5 Ω Output Signal Swing RL ≥ 500 Ω (for |VS| ≤ ±5 V); RL ≥ 1 kΩ above that |VS| − 1.5 V RL ≥ 1 kΩ (for |VS| = ±12 V) |VS| − 2.25 V Output Current Linear operation − minimum discernable distortion 20 mA Short-Circuit Current VS = ±3 V +123/−72 mA VS = ±5 V +123/−72 mA VS = ±12 V +72/−73 mA Output Offset Voltage VGAIN = 0.7 V, gain = 200× −250 −125 +150 mV ±3 V ≤ VS ≤ ±12 V −200 mV −55°C ≤ T ≤ +125°C −200 mV PWRA PIN Normal Power (Logic Low) VS = ±3 V 0.7 V Low Power (Logic High) VS = ±3 V 1.5 V Normal Power (Logic Low) VS = ±5 V 1.2 V Low Power (Logic High) VS = ±5 V 2.0 V Normal Power (Logic Low) VS = ±12 V 3.2 V Low Power (Logic High) VS = ±12 V 4.0 V POWER SUPPLY Supply Voltage Operating Range ±3 ±12 V Quiescent Current VS = ±3 V 22 25 30 −55°C ≤ T ≤ +125°C 23 to 31 mA PWRA = 3 V 10 14 18 VS = ±5 V 22 26 30 −55°C ≤ T ≤ +125°C 23 to 31 mA PWRA = 5 V 10 14 18 VS = ±12 V 23 28 31 −55°C ≤ T ≤ +125°C 24 to 33 mA PWRA = 5 V 16 Power Dissipation VS = ±3 V 150 mW VS = ±5 V 260 mW VS = ±12 V 672 mW Power Supply Rejection Ratio (PSRR) VGAIN = 0.7 V, f = 1 MHz −40 dB 1 All dBm values are calculated with 50 Ω reference, unless otherwise noted. 2 Conformance to theoretical gain expression (see the Setting the Gain section). Rev. F | Page 4 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION OVERVIEW PREAMPLIFIER VGA SETTING THE GAIN NOISE OFFSET VOLTAGE APPLICATIONS INFORMATION AMPLIFIER CONFIGURATION PREAMPLIFIER Circuit Configuration for Noninverting Gain Circuit Configuration for Inverting Gain USING THE POWER ADJUST FEATURE DRIVING CAPACITIVE LOADS EVALUATION BOARD OPTIONAL CIRCUITRY BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE