Datasheet AD9277 (Analog Devices) - 5

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AD9277 Parameter1 Test Conditions/Comments Min Typ Max Unit
Noise Figure GAIN+ = 1.6 V, RS = 50 Ω Active Termination Matched LNA gain = 15.6 dB, RFB = 200 Ω 7.5 dB LNA gain = 17.9 dB, RFB = 250 Ω 6.2 dB LNA gain = 21.3 dB, RFB = 350 Ω 4.5 dB Unterminated LNA gain = 15.6 dB, RFB = ∞ 4.6 dB LNA gain = 17.9 dB, RFB = ∞ 3.6 dB LNA gain = 21.3 dB, RFB = ∞ 2.8 dB Correlated Noise Ratio No signal, correlated/uncorrelated −30 dB Output Offset −110 +110 LSB Signal-to-Noise Ratio (SNR) fIN = 5 MHz at −10 dBFS, GAIN+ = 0 V 67.5 dBFS fIN = 5 MHz at −1 dBFS, GAIN+ = 1.6 V 59 dBFS Harmonic Distortion Second Harmonic fIN = 5 MHz at −10 dBFS, GAIN+ = 0 V −65 dBc fIN = 5 MHz at −1 dBFS, GAIN+ = 1.6 V −70 dBc Third Harmonic fIN = 5 MHz at −10 dBFS, GAIN+ = 0 V −72 dBc fIN = 5 MHz at −1 dBFS, GAIN+ = 1.6 V −60 dBc Two-Tone Intermodulation (IMD3) fRF1 = 5.015 MHz, fRF2 = 5.020 MHz, −55 dBc ARF1 = 0 dB, ARF2 = −20 dB, GAIN+ = 1.6 V, IMD3 relative to ARF2 Channel-to-Channel Crosstalk fIN = 5 MHz at −1 dBFS −70 dB Overrange condition2 −65 dB Channel-to-Channel Delay Full TGC path, fIN = 5 MHz, GAIN+ = 0 V to 1.6 V 0.3 Degrees Variation PGA Gain Differential input to differential output 21/24/27/30 dB GAIN ACCURACY 25°C Gain Law Conformance Error 0 < GAIN+ < 0.16 V 1.5 dB 0.16 V < GAIN+ < 1.44 V −1.5 +1.5 dB 1.44 V < GAIN+ < 1.6 V −2.5 dB Linear Gain Error GAIN+ = 0.8 V, normalized for ideal AAF loss −1.5 +1.5 dB Channel-to-Channel Matching 0.16 V < GAIN+ < 1.44 V 0.1 dB GAIN CONTROL INTERFACE Normal Operating Range 0 1.6 V Gain Range GAIN+ = 0 V to 1.6 V −42 0 dB Scale Factor 28.5 dB/V Response Time 42 dB change 750 ns GAIN+ Impedance Single-ended 10 MΩ GAIN− Impedance Single-ended 70 kΩ CW DOPPLER MODE LO Frequency fLO = f4LO/4 1 10 MHz Phase Increment Per channel 22.5 Degrees Output DC Bias (Single-Ended) CWI+, CWI−, CWQ+, CWQ− 1.5 V Maximum Output Swing Per CWI+, CWI−, CWQ+, CWQ−, per channel ±1.25 mA enabled Transconductance (Differential) Demodulated IOUT/VIN, each I or Q output LNA gain = 15.6 dB 1.8 mA/V LNA gain = 17.9 dB 2.4 mA/V LNA gain = 21.3 dB 3.5 mA/V Input-Referred Noise Voltage RS = 0 Ω, RFB = ∞ LNA gain = 15.6 dB 1.5 nV/√Hz LNA gain = 17.9 dB 1.4 nV/√Hz LNA gain = 21.3 dB 1.3 nV/√Hz Rev. 0 | Page 5 of 48 Document Outline FEATURES APPLICATIONS PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ADC TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL IMPEDANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TGC MODE CW DOPPLER MODE EQUIVALENT CIRCUITS THEORY OF OPERATION ULTRASOUND CHANNEL OVERVIEW Low Noise Amplifier (LNA) Active Impedance Matching LNA Noise INPUT OVERDRIVE Input Overload Protection CW DOPPLER OPERATION Quadrature Generation I/Q Demodulator and Phase Shifter Dynamic Range and Noise Phase Compensation and Analog Beamforming CW Application Information TGC OPERATION Variable Gain Amplifier (VGA) Gain Control VGA Noise Antialiasing Filter (AAF) ADC CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode DIGITAL OUTPUTS AND TIMING SDIO Pin SCLK Pin CSB Pin RBIAS Pin Voltage Reference SERIAL PORT INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS APPLICATIONS INFORMATION POWER AND GROUND RECOMMENDATIONS EXPOSED PADDLE THERMAL HEAT SLUG RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE