Datasheet AD9253-EP (Analog Devices) - 3
| Hersteller | Analog Devices |
| Beschreibung | Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter |
| Seiten / Seite | 11 / 3 — Enhanced Product. AD9253-EP. SPECIFICATIONS DC SPECIFICATIONS. Table 1. … |
| Revision | B |
| Dateiformat / Größe | PDF / 233 Kb |
| Dokumentensprache | Englisch |
Enhanced Product. AD9253-EP. SPECIFICATIONS DC SPECIFICATIONS. Table 1. Parameter1. Temp. Min. Typ. Max. Unit
Modelllinie für dieses Datenblatt
Textversion des Dokuments
Enhanced Product AD9253-EP SPECIFICATIONS DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 1. Parameter1 Temp Min Typ Max Unit
RESOLUTION 14 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error Full −0.8 −0.3 +0.1 % FSR Offset Matching Full −0.6 +0.2 +0.6 % FSR Gain Error Full −12 −3 +2 % FSR Gain Matching Full 1.1 1.6 % FSR Differential Nonlinearity (DNL) Full −0.8 +1.9 LSB 25°C ±0.8 LSB Integral Nonlinearity (INL) Full −4.5 +4.5 LSB 25°C ±2.0 LSB TEMPERATURE DRIFT Offset Error Full ±2 ppm/°C Gain Error Full ±50 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage (1 V Mode) Full 0.98 1.0 1.02 V Load Regulation at 1.0 mA (VREF = 1 V) Full 2 mV Input Resistance Full 7.5 kΩ INPUT-REFERRED NOISE VREF = 1.0 V 25°C 0.94 LSB rms ANALOG INPUTS Differential Input Voltage (VREF = 1 V) Full 2 V p-p Common-Mode Voltage Full 0.9 V Differential Input Resistance 5.2 kΩ Differential Input Capacitance Full 3.5 pF POWER SUPPLY AVDD Full 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 V I 2 AVDD Full 183 205 mA IDRVDD (ANSI-644 Mode)2 Full 61 63 mA IDRVDD (Reduced Range Mode)2 25°C 53 mA TOTAL POWER CONSUMPTION DC Input Full 403 mW Sine Wave Input (Four Channels Including Output Drivers ANSI-644 Mode) Full 440 480 mW Sine Wave Input (Four Channels Including Output Drivers Reduced Range Mode) 25°C 425 mW Power-Down Mode Full 2 mW Standby Mode3 Full 235 mW 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed. 2 Measured with a low input frequency, full-scale sine wave on all four channels. 3 It can be control ed via the SPI. Rev. B | Page 3 of 11 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications DC Specifications AC Specifications Digital Specifications Switching Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Outline Dimensions Ordering Guide
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 1. Parameter1 Temp Min Typ Max Unit
RESOLUTION 14 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error Full −0.8 −0.3 +0.1 % FSR Offset Matching Full −0.6 +0.2 +0.6 % FSR Gain Error Full −12 −3 +2 % FSR Gain Matching Full 1.1 1.6 % FSR Differential Nonlinearity (DNL) Full −0.8 +1.9 LSB 25°C ±0.8 LSB Integral Nonlinearity (INL) Full −4.5 +4.5 LSB 25°C ±2.0 LSB TEMPERATURE DRIFT Offset Error Full ±2 ppm/°C Gain Error Full ±50 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage (1 V Mode) Full 0.98 1.0 1.02 V Load Regulation at 1.0 mA (VREF = 1 V) Full 2 mV Input Resistance Full 7.5 kΩ INPUT-REFERRED NOISE VREF = 1.0 V 25°C 0.94 LSB rms ANALOG INPUTS Differential Input Voltage (VREF = 1 V) Full 2 V p-p Common-Mode Voltage Full 0.9 V Differential Input Resistance 5.2 kΩ Differential Input Capacitance Full 3.5 pF POWER SUPPLY AVDD Full 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 V I 2 AVDD Full 183 205 mA IDRVDD (ANSI-644 Mode)2 Full 61 63 mA IDRVDD (Reduced Range Mode)2 25°C 53 mA TOTAL POWER CONSUMPTION DC Input Full 403 mW Sine Wave Input (Four Channels Including Output Drivers ANSI-644 Mode) Full 440 480 mW Sine Wave Input (Four Channels Including Output Drivers Reduced Range Mode) 25°C 425 mW Power-Down Mode Full 2 mW Standby Mode3 Full 235 mW 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed. 2 Measured with a low input frequency, full-scale sine wave on all four channels. 3 It can be control ed via the SPI. Rev. B | Page 3 of 11 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications DC Specifications AC Specifications Digital Specifications Switching Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Outline Dimensions Ordering Guide