Datasheet AD9257-EP (Analog Devices) - 3
| Hersteller | Analog Devices |
| Beschreibung | Octal, 14-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| Seiten / Seite | 13 / 3 — Data Sheet. AD9257-EP. SPECIFICATIONS DC SPECIFICATIONS. Table 1. … |
| Revision | A |
| Dateiformat / Größe | PDF / 300 Kb |
| Dokumentensprache | Englisch |
Data Sheet. AD9257-EP. SPECIFICATIONS DC SPECIFICATIONS. Table 1. Parameter1. Temp. Min. Typ. Max. Unit
Modelllinie für dieses Datenblatt
Textversion des Dokuments
Data Sheet AD9257-EP SPECIFICATIONS DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 1. Parameter1 Temp Min Typ Max Unit
RESOLUTION 14 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error Full −0.7 −0.3 +0.1 % FSR Offset Matching Full 0 0.23 0.6 % FSR Gain Error Full −7.0 −2.9 +1.0 % FSR Gain Matching Full −1.0 +1.6 +5.0 % FSR Differential Nonlinearity (DNL) Full −0.95 ±0.6 +1.6 LSB Integral Nonlinearity (INL) Full −4.5 ±1.1 +4.5 LSB TEMPERATURE DRIFT Offset Error Full ±2 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage (1 V Mode) Full 0.98 0.99 1.01 V Load Regulation at 1.0 mA (VREF = 1 V) Full 2 mV Input Resistance Full 7.5 kΩ INPUT REFERRED NOISE VREF = 1.0 V 25°C 0. 94 LSB rms ANALOG INPUTS Differential Input Voltage (VREF = 1 V) Full 2 V p-p Common-Mode Voltage Full 0.9 V Common-Mode Range Full 0.5 1.3 V Differential Input Resistance 5.2 kΩ Differential Input Capacitance Full 3.5 pF POWER SUPPLY AVDD Full 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 V IAVDD Full 198 211 mA IDRVDD (ANSI-644 Mode) Full 60 93 mA IDRVDD (Reduced Range Mode) 25°C 45 mA TOTAL POWER CONSUMPTION Total Power Dissipation (Eight Channels, ANSI-644 Mode) Full 464 547 mW Total Power Dissipation (Eight Channels, Reduced Range Mode) 25°C 437 mW Power-Down Dissipation 25°C 1 mW Standby Dissipation2 25°C 92 mW 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed. 2 Can be controlled via the SPI. Rev. A | Page 3 of 13 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 1. Parameter1 Temp Min Typ Max Unit
RESOLUTION 14 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error Full −0.7 −0.3 +0.1 % FSR Offset Matching Full 0 0.23 0.6 % FSR Gain Error Full −7.0 −2.9 +1.0 % FSR Gain Matching Full −1.0 +1.6 +5.0 % FSR Differential Nonlinearity (DNL) Full −0.95 ±0.6 +1.6 LSB Integral Nonlinearity (INL) Full −4.5 ±1.1 +4.5 LSB TEMPERATURE DRIFT Offset Error Full ±2 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage (1 V Mode) Full 0.98 0.99 1.01 V Load Regulation at 1.0 mA (VREF = 1 V) Full 2 mV Input Resistance Full 7.5 kΩ INPUT REFERRED NOISE VREF = 1.0 V 25°C 0. 94 LSB rms ANALOG INPUTS Differential Input Voltage (VREF = 1 V) Full 2 V p-p Common-Mode Voltage Full 0.9 V Common-Mode Range Full 0.5 1.3 V Differential Input Resistance 5.2 kΩ Differential Input Capacitance Full 3.5 pF POWER SUPPLY AVDD Full 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 V IAVDD Full 198 211 mA IDRVDD (ANSI-644 Mode) Full 60 93 mA IDRVDD (Reduced Range Mode) 25°C 45 mA TOTAL POWER CONSUMPTION Total Power Dissipation (Eight Channels, ANSI-644 Mode) Full 464 547 mW Total Power Dissipation (Eight Channels, Reduced Range Mode) 25°C 437 mW Power-Down Dissipation 25°C 1 mW Standby Dissipation2 25°C 92 mW 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed. 2 Can be controlled via the SPI. Rev. A | Page 3 of 13 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE