Datasheet AD7981-KGD (Analog Devices) - 7

HerstellerAnalog Devices
BeschreibungHigh Temperature, 16-Bit, 600 kSPS PulSAR ADC
Seiten / Seite9 / 7 — Known Good Die. AD7981-KGD. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. …
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DokumentenspracheEnglisch

Known Good Die. AD7981-KGD. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. REF. VIO. VDD. IN+. SDI. IN–. SCK. GND. SDO. 7 6. CNV

Known Good Die AD7981-KGD PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REF VIO VDD IN+ SDI IN– SCK GND SDO 7 6 CNV

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Known Good Die AD7981-KGD PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REF 1 10 VIO REF 1 VDD 2 VDD 2 10 VIO IN+ 3 9 SDI IN– 4 8 SCK GND 5 SDO GND 5 7 6 CNV
5 -00 12479 Figure 4. Pad Configuration
Table 5. Pad Function Descriptions Pad X-Axis Y-Axis Pad No. Mnemonic (µm) (µm) Type1 Description
1 REF −602 +1014 AI Reference Input Voltage. The REF range is from 2.4 V to 5.1 V. It is referred to the GND pin. 1 REF −602 +811 AI Decouple REF with a 10 µF capacitor as close as possible to the pin. 2 VDD −602 +719 P Power Supply. 2 VDD −602 +517 P 3 IN+ −616 −198 AI Analog Input. This pin is referred to IN+. The voltage range, for example, the difference between IN+ and IN−, is 0 V to VREF. 4 IN− −616 −372 AI Analog Input Ground Sense. Connect this pin to the analog ground plane or to a remote sense ground. 5 GND −616 −558 P Power Supply Ground. 5 GND −610 −730 P 6 CNV +624 −850 DI Conversion Input. This input has multiple functions. On its leading edge, it initiates the conversions and selects the interface mode of the device: chain mode or CS mode. In CS mode, it enables the SDO pin when low. In chain mode, read the data when CNV is high. 7 SDO +624 −675 DO Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK. 8 SCK +624 −470 DI Serial Data Clock Input. When the device is selected, this clock shifts out the conversion result. 9 SDI +624 −288 DI Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as follows: Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a data input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data level on SDI is output on SDO with a delay of 16 SCK cycles. CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can enable the serial output signals when low. If SDI or CNV is low when the conversion is complete, the busy indicator feature is enabled. 10 VIO +619 +123 P Input/Output Interface Digital Power. Nominal y it is at the same supply as the host interface 10 VIO +622 +993 P (1.8 V, 2.5 V, 3 V, or 5 V). 1AI = analog input, DI = digital input, DO = digital output, and P = power. Rev. A | Page 7 of 9 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE