Datasheet ADL5335 (Analog Devices) - 5

Data Sheet ADL5335 Parameter Test Conditions/Comments Min Typ Max Unit
Return Loss Input −19 dB Output Minimum gain −17 dB Maximum gain −11 dB CMRR vs. frequency (±200 MHz) 28 dB FREQUENCY = 4.2 GHz Gain Range 20 dB Maximum Gain 9.3 dB Minimum Gain −10.7 dB Gain Flatness ±200 MHz, all gains 0.9 dB Gain Step Error All gain states 0.49 dB Group Delay Variation Between any attenuation step 25 ps Output IP3 Maximum gain, −4 dBm per tone 29 dBm Minimum gain, −18 dBm per tone 11 dBm Output P1dB Maximum gain 15.8 dBm Minimum gain −3.7 dBm Noise Figure Maximum gain 8.7 dB Minimum gain 13.5 dB Return Loss Input −24 dB Output Minimum gain −12 dB Maximum gain −11 dB CMRR 29 dB SPI PORT AND FAST ATTACK SDIO, SCLK, CS, FA pins Logic Low 0.18 V Logic High 1.62 1.8 V Fast Attack Response Time 20 ns ENABLE INTERFACE ENBL pin Voltage Level To Enable ENBL voltage (VENBL) increasing 1.62 1.8 V To Disable Enable/disable voltage (VENBLDN) increasing 0 0.18 V Time Enable 30 ns Disable 30 ns POWER SUPPLY INTERFACE VPOSx pins Supply Voltage Main supply 4.75 5 5.25 V Quiescent Current Device enabled 125 mA Power Consumption Device enabled 625 mW Power-down mode 18.5 mW Rev. 0 | Page 5 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DIGITAL LOGIC TIMING SPI Timing Diagram ABSOLUTE MAXIMUM RATINGS THREMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC STRUCTURE DIGITAL INTERFACE OVERVIEW Serial Peripheral Interface (SPI) Fast Attack (FA) APPLICATIONS INFORMATION BASIC CONNECTIONS OUTLINE DIMENSIONS ORDERING GUIDE