Key Sheet AD7792, AD7793 (Analog Devices) - 3

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Key Sheet AD7792/AD7793 OPERATING THE AD7792/ AD7793 DATA INTERFACE
is a read of the data register. When the data-word has been read from the data register, DOUT/RDY goes high. The user can read The data interface for the AD7792/AD7793 is this register additional times, if required. • Performed using a 4- or 3-wire SPI •
CS
Compatible with SPI, QSPI, MICROWIRE, and DSP • Al ows a user to both write to and read from the AD7792/AD7793 on the same data bus
DIN DATA DATA REQUEST REQUEST
• Indicates when transferred data is available by bringing the DOUT/RDY signal and the RDY bit in the status register low
DATA DOUT/RDY DATA AD7792/AD7793 (SLAVE)
003
SCLK
11263-
CS1
Figure 3. Continuous Conversion Mode
SCLK DSP/FPGA/ Continuous Read Mode MICROCONTROLLER DOUT/RDY
Rather than write to the communications register each time a conversion is complete to access the data, the AD7792/AD7793
DIN
can be configured so that the conversions are automatically placed on the DOUT/RDY line. By writing 01011100 to the
1CS IS PERMANENTLY TIED LOW IN THE 3-WIRE INTERFACE.
002 communications register, the user need only apply the
(IF CS IS REQUIRED AS A DECODING SIGNAL, IT CAN BE GENERATED FROM A PORT PIN.)
11263- appropriate number of SCLK cycles to the ADC, and the Figure 2. AD7792/AD7793 Data Interface, 4-Wire SPI conversion word is automatical y placed on the DOUT/RDY line when a conversion is complete.
Table 3. 4-Wire Serial Interface Pin Functions Pin Function CS
CS1 Selects the ADC (also applicable in systems with multiple devices on the serial bus). Provides a frame synchronization signal.2
DIN
SCLK Determines when data transfers (either on DIN or DOUT/RDY) occur.
DOUT/RDY DATA DATA DATA
DOUT/RDY Accesses data from the on-chip registers. Indicates when the transferred data is available. 005 DIN Transfers data into the on-chip registers.
SCLK
11263- Figure 4. Continuous Read Mode 1 CS is permanently tied low in the 3-wire interface. (If CS is required as a decoding signal, it can be generated from a port pin.) When DOUT/RDY goes low to indicate the end of a conversion, 2 Useful for DSP interfaces. The first bit (MSB) is effectively clocked out by CS sufficient SCLK cycles must be applied to the ADC. The data because CS typically occurs after the falling edge of SCLK in DSPs. The SCLK conversion is then placed on the DOUT/RDY line. When the can continue to run between data transfers, provided the timing numbers are obeyed. conversion is read, DOUT/RDY returns high until the next con- version is available. In this mode, the data can be read only once.
DATA MODES
In continuous read mode, the serial interface is dedicated to reads There are three data modes available: continuous conversion of the data register. If any other register needs to be accessed, con- mode, continuous read mode, and single conversion mode. tinuous read mode must be disabled. In addition, every time a
Continuous Conversion Mode (Default)
conversion is available, the serial interface is reset in this mode. Therefore, it is essential that the conversion be read before the Continuous conversion is the default power-up mode. In this next conversion is available. mode, the AD7792/AD7793 convert continuously, and the RDY bit in the status register goes low each time a conversion is While in the continuous read mode, the ADC monitors activity on complete. If CS is low, the DOUT/RDY line also goes low when a the DIN line so that it can receive the instruction to exit the con- conversion is complete. To read a conversion, the user writes to tinuous read mode. Additionally, a reset occurs if 32 consecutive 1s the communications register, indicating that the next operation are seen on DIN. Therefore, DIN should be held low in continuous read mode until an instruction is to be written to the device. Rev. 0 | Page 3 of 6 Document Outline General Description Features and Benefits Key Characteristics Fundamental Specifications Noise Operating the AD7792/AD7793 Data Interface Data Modes Continuous Conversion Mode (Default) Continuous Read Mode Single Conversion Mode Typical Application Diagram Frequently Asked Questions Learn More and Start Designing Compatible Devices Package Diagram Getting Started