Datasheet A4975 (Allegro) - 6

A4975 Full-Bridge PWM Microstepping Motor Driver
PFD
1 16
LOAD V SUPPLY BB REF
2 15
OUTB Note the A4975SB (DIP) and the A4975SLB RC
3 14
D0 (SOIC) are electrically identical and share a common terminal number assignment. GROUND
4 13
GROUND LOGIC GROUND
5 12
GROUND LOGIC
6
V
11
SENSE SUPPLY CC PHASE
7 10
OUTA D
8 9
D 2 1
Terminal Functions Terminal Name Description
1 PFD (Percent Fast Decay) The analog input used to set the current decay mode. 2 REF (VREF) The voltage at this input (along with the value of RS and the states of DAC inputs D0, D1, and D2) set the peak output current. 3 RC The parallel combination of external resistor RT and capacitor CT set the off time for the PWM current regulator. CT also sets the blanking time. 4-5 GROUND Return for the logic supply (VCC) and load supply (VBB); the reference for all voltage measurements. 6 LOGIC SUPPLY (VCC) Supply voltage for the logic circuitry. Typically = 5 V. 7 PHASE The PHASE input determines the direction of current in the load. 8 D2 (DATA2) One-of-three (MSB) control bits for the internal digital-to-analog converter. 9 D1 (DATA1) One-of-three control bits for the internal digital-to-analog converter. 10 OUTA One-of-two output load connections. 11 SENSE Connection to the sink-transistor emitters. Sense resistor RS is connected between this point and ground. 12-13 GROUND Return for the logic supply (VCC) and load supply (VBB); the reference for all voltage measurements. 14 D0 (DATA0) One-of-three (LSB) control bits for the internal digital-to-analog converter. 15 OUTB One-of-two output load connections. 16 LOAD SUPPLY (VBB) Supply voltage for the load. Allegro MicroSystems, LLC 6 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com