Datasheet ADUM1234 (Analog Devices) - 3

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Data Sheet ADuM1234 SPECIFICATIONS ELECTRICAL CHARACTERISTICS
4.5 V ≤ VDD1 ≤ 5.5 V, 12 V ≤ VDDA ≤ 18 V, 12 V ≤ VDDB ≤ 18 V. All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD1 = 5 V, VDDA = 15 V, VDDB = 15 V. All voltages are relative to their respective grounds.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS Input Supply Current, Quiescent IDDI(Q) 3.0 4.2 mA Output Supply Current A or Output Supply IDDA(Q), 0.3 1.2 mA Current B, Quiescent IDDB(Q) Input Supply Current, 10 Mbps IDDI(10) 6.0 9.0 mA Output Supply Current A or Output Supply IDDA(10), 16 22 mA CL = 200 pF Current B, 10 Mbps IDDB(10) Input Currents IIA, IIB, −10 +0.01 +10 µA 0 V ≤ VIA, VIB, VDISABLE ≤ VDD1 IDISABLE Logic High Input Threshold VIH 0.7 × VDD1 V Logic Low Input Threshold VIL 0.3 × VDD1 V Logic High Output Voltages VOAH, VOBH VDDA − 0.1, VDDA, VDDB V IOA, IOB = −1 mA VDDB − 0.1 Logic Low Output Voltages VOAL, VOBL 0.1 V IOA, IOB = +1 mA Output Short-Circuit Pulsed Current1 IOA(SC), IOB(SC) 100 mA SWITCHING SPECIFICATIONS CL = 200 pF Minimum Pulse Width2 PW 100 ns Maximum Switching Frequency3 10 Mbps Propagation Delay4 tPHL, tPLH 97 124 160 ns Change vs. Temperature 100 ps/°C Pulse Width Distortion, |tPLH − tPHL| PWD 8 ns Channel-to-Channel Matching, 5 ns Rising or Falling Edges5 Channel-to-Channel Matching, 13 ns Rising vs. Falling Edges6 Part-to-Part Matching, Rising 55 ns Input tR = 3 ns or Falling Edges7 Part-to-Part Matching, Rising 63 ns Input tR = 3 ns vs. Falling Edges8 Output Rise/Fall Time (10% to 90%) tR/tF 25 ns 1 Short-circuit duration less than 1 sec. 2 The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed. 3 The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed. 4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal. 5 Channel-to-channel matching, rising or falling edges, is the magnitude of the propagation delay difference between two channels of the same part when the inputs are either both rising or falling edges. The supply voltages and the loads on each channel are equal. 6 Channel-to-channel matching, rising vs. falling edges, is the magnitude of the propagation delay difference between two channels of the same part when one input is a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal. 7 Part-to-part matching, rising or falling edges, is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal. 8 Part-to-part matching, rising vs. falling edges, is the magnitude of the propagation delay difference between the same channels of two different parts when one input is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal. Rev. A | Page 3 of 12 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Electrical Characteristics Package Characteristics Regulatory Information Insulation and Safety-Related Specifications DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Insulation Characteristics Recommended Operating Conditions Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Perfomance Characteristics Applications Information Common-Mode Transient Immunity Insulation Lifetime Outline Dimensions Ordering Guide