Datasheet ADuM4136 (Analog Devices) - 5

HerstellerAnalog Devices
BeschreibungSingle-/Dual-Supply, High Voltage Isolated IGBT Gate Driver
Seiten / Seite16 / 5 — Data Sheet. ADuM4136. DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION …
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Data Sheet. ADuM4136. DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS

Data Sheet ADuM4136 DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS

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Data Sheet ADuM4136 DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working voltage.
Table 5. VDE Characteristics Description Test Conditions/Comments Symbol Characteristic Unit
Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms I to IV For Rated Mains Voltage ≤ 300 V rms I to III For Rated Mains Voltage ≤ 400 V rms I to II Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 1 2 Maximum Working Insulation Voltage VIORM 849 V peak Input to Output Test Voltage, Method B1 VIORM × 1.875 = Vpd (m), 100% production test, tini = tm = 1 sec, Vpd (m) 1592 V peak partial discharge < 5 pC Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec, partial Vpd (m) 1274 V peak discharge < 5 pC After Input and/or Safety Test Subgroup 2 VIORM × 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec, partial Vpd (m) 1019 V peak and Subgroup 3 discharge < 5 pC Highest Allowable Overvoltage VIOTM 8000 V peak Surge Isolation Voltage VPEAK = 12.8 kV, 1.2 μs rise time, 50 μs, 50% fall time VIOSM 8000 V peak Safety Limiting Values Maximum value allowed in the event of a failure (see Figure 2) Maximum Junction Temperature TS 150 °C Safety Total Dissipated Power PS 2.77 W Insulation Resistance at TS VIO = 500 V RS >109 Ω
3.0 RECOMMENDED OPERATING CONDITIONS ) 2.5 Table 6. (W R E Parameter Value W 2.0
Operating Temperature Range (TA) −40°C to +125°C
PO G IN
Supply Voltages
1.5 T A
V 1 DD1 2.5 V to 6 V
PER
V 2 12 V to 35 V
O 1.0
DD2
E F
V 2 DD2 − VSS2 12 V to 35 V
SA 0.5
V 2 SS2 −15 V to 0 V Input Signal Rise/Fall Time 1 ms
0
02 Static Common Mode Transient Immunity3 −100 kV/μs to
0 50 100 150 200
-0
AMBIENT TEMPERATURE (°C)
575 +100 kV/μs 13 Figure 2. Thermal Derating Curve, Dependence of Safety Dynamic Common Mode Transient Immunity4 −100 kV/μs to Limiting Values on Case Temperature, per DIN V VDE V 0884-10 +100 kV/μs 1 Referenced to VSS1. 2 Referenced to GND2. 3 Static common-mode transient immunity is defined as the largest dv/dt between VSS1 and VSS2 with inputs held either high or low such that the output voltage remains either above 0.8 × VDD2 for output high, or 0.8 V for output low. Operation with transients above recommended levels can cause momentary data upsets. 4 Dynamic common-mode transient immunity is defined as the largest dv/dt between VSS1 and VSS2 with the switching edge coincident with the transient test pulse. Operation with transients above recommended levels can cause momentary data upsets. Rev. 0 | Page 5 of 16 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Electrical Characteristics Package Characteristics Regulatory Information Insulation and Safety Related Specifications DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics Recommended Operating Conditions Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performanace Characteristics Applications Information PCB Layout Propagation Delay Related Parameters Protection Features Fault Reporting Desaturation Detection Thermal Shutdown Undervoltage Lockout (UVLO) Faults READY Pin Pin Pin VI+ and VI− Operation Gate Resistance Selection Power Dissipation DC Correctness and Magnetic Field Immunity Insulation Lifetime Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example Typical Application Outline Dimensions Ordering Guide