Datasheet ADuM4120/ADuM4120-1 (Analog Devices) - 3

HerstellerAnalog Devices
BeschreibungIsolated, Precision Gate Driver with 2 A Output
Seiten / Seite17 / 3 — Data Sheet. ADuM4120/ADuM4120-1. SPECIFICATIONS ELECTRICAL …
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DokumentenspracheEnglisch

Data Sheet. ADuM4120/ADuM4120-1. SPECIFICATIONS ELECTRICAL CHARACTERISTICS. Table 1. Parameter. Symbol. Min. Typ. Max. Unit

Data Sheet ADuM4120/ADuM4120-1 SPECIFICATIONS ELECTRICAL CHARACTERISTICS Table 1 Parameter Symbol Min Typ Max Unit

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Data Sheet ADuM4120/ADuM4120-1 SPECIFICATIONS ELECTRICAL CHARACTERISTICS
Low-side voltages referenced to GND1. High-side voltages referenced to GND2; 2.5 V ≤ VDD1 ≤ 6.5 V; 4.5 V ≤ VDD2 ≤ 35 V, and TJ = −40°C to +125°C. All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TJ = 25°C, VDD1 = 5.0 V, and VDD2 = 15 V, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS High-Side Power Supply VDD2 Input Voltage VDD2 4.5 35 V VDD2 Input Current, Quiescent IDD2(Q) 1.7 2.6 mA Logic Supply VDD1 Input Voltage VDD1 2.5 6.5 V Input Current IDD1 3.6 5 mA VIN = high Logic Input VIN VIN Input Current IVIN −1 0.01 +1 μA Logic Input Voltage High VIH 0.7 × VDD1 V 2.5 V ≤ VDD1 ≤ 5 V 3.5 V VDD1 > 5 V Low VIL 0.3 × VDD1 V 2.5 V ≤ VDD1 ≤ 5 V 1.5 V VDD1 > 5 V Undervoltage Lockout (UVLO) VDD1 Positive Going Threshold VVDD1UV+ 2.45 2.5 V Negative Going Threshold VVDD1UV− 2.3 2.35 V Hysteresis VVDD1UVH 0.1 V VDD2 Grade A Positive Going Threshold VVDD2UV+ 4.4 4.5 V Negative Going Threshold VVDD2UV− 4.1 4.2 V Hysteresis VVDD2UVH 0.2 V Grade B Positive Going Threshold VVDD2UV+ 7.3 7.5 V Negative Going Threshold VVDD2UV− 6.9 7.1 V Hysteresis VVDD2UVH 0.2 V Grade C Positive Going Threshold VVDD2UV+ 11.3 11.6 V Negative Going Threshold VVDD2UV− 10.8 11.1 V Hysteresis VVDD2UVH 0.2 V Thermal Shutdown (TSD) TSD Positive Edge TTSD_POS 155 °C TSD Hysteresis TTSD_HYST 30 °C Internal NMOS Gate Resistance RDSON_N 0.6 1.6 Ω Tested at 250 mA, VDD2 = 15 V 0.6 1.6 Ω Tested at 1 A, VDD2 = 15 V Internal PMOS Gate Resistance RDSON_P 0.8 1.8 Ω Tested at 250 mA, VDD2 = 15 V 0.8 1.8 Ω Tested at 1 A, VDD2 = 15 V Peak Output Current IPK 2.3 A VDD2 = 12 V, 4 Ω gate resistance Rev. 0 | Page 3 of 17 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS REGULATORY INFORMATION PACKAGE CHARACTERISTICS INSULATION AND SAFETY RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION PCB LAYOUT PROPAGATION DELAY RELATED PARAMETERS THERMAL LIMITATIONS AND SWITCH LOAD CHARACTERISTICS UNDERVOLTAGE LOCKOUT (UVLO) OUTPUT LOAD CHARACTERISTICS POWER DISSIPATION DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY INSULATION LIFETIME Surface Tracking Insulation Wear Out Calculation and Use of Parameters Example OUTLINE DIMENSIONS ORDERING GUIDE