Datasheet ADuM4122 (Analog Devices) - 3

HerstellerAnalog Devices
BeschreibungSingle Gate, Adjustable Slew Rate, Isolated Gate Driver, 3 A Short-Circuit (
Seiten / Seite18 / 3 — Data Sheet. ADuM4122. SPECIFICATIONS. ELECTRICAL SPECIFICATIONS. Table 1. …
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Data Sheet. ADuM4122. SPECIFICATIONS. ELECTRICAL SPECIFICATIONS. Table 1. Parameter. Symbol Min. Typ. Max. Unit. Test Conditions/Comments

Data Sheet ADuM4122 SPECIFICATIONS ELECTRICAL SPECIFICATIONS Table 1 Parameter Symbol Min Typ Max Unit Test Conditions/Comments

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Data Sheet ADuM4122 SPECIFICATIONS ELECTRICAL SPECIFICATIONS
Low-side voltages are referenced to GND1. High side voltages are referenced to GND2: 3.3 V ≤ VDD1 ≤ 6.5 V, 4.5 V ≤ VDD2 ≤ 35 V, and TJ = −40°C to +125°C. Al minimum and maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TJ = 25°C, VDD1 = 5.0 V, and VDD2 = 15 V.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS High Side Power Supply VDD2 Input Voltage VDD2 4.5 35 V VDD2 Input Current, Quiescent IDD2(Q) 2 4 mA Not switching Logic Supply VDD1 Input Voltage VDD1 3.3 6.5 V Input Current IDD1 1.5 2.5 mA VIN+ = low, SRC = high IDD1 6 10 mA VIN+ = low, SRC = low IDD1 6 10 mA VIN+ = high, SRC = high IDD1 11 17 mA VIN+ = high, SRC = low VIN+ and SRC Logic Input VIN+ and SRC Input Current IIN −1 +0.01 +1 µA Logic High Input Voltage VIH 0.7 × V 3.3 V ≤ VDD1 ≤ 5 V VDD1 3.5 V VDD1 > 5 V Logic Low Input Voltage VIL 0.3 × V 3.3 V ≤ VDD1 ≤ 5 V VDD1 1.5 V VDD1 > 5 V Undervoltage Lockout (UVLO) VDD1 Positive Going Threshold VVDD1UV+ 3.2 3.3 V Negative Going Threshold VVDD1UV− 3.0 3.1 V Hysteresis VVDD1UVH 0.1 V VDD2 Grade A Positive Going Threshold VVDD2UV+ 4.4 4.5 V Negative Going Threshold VVDD2UV− 4.1 4.2 V Hysteresis VVDD2UVH 0.2 V Grade B Positive Going Threshold VVDD2UV+ 7.3 7.5 V Negative Going Threshold VVDD2UV− 6.9 7.1 V Hysteresis VVDD2UVH 0.2 V Grade C Positive Going Threshold VVDD2UV+ 11.3 11.6 V Negative Going Threshold VVDD2UV− 10.8 11.1 V Hysteresis VVDD2UVH 0.2 V Thermal Shutdown (TSD) TSD Positive Edge TTSD_POS 155 °C TSD Hysteresis TTSD_HYST 30 °C VOUT NMOS Gate Resistance1 RDSON_N 1.1 2.3 Ω Tested at 250 mA, VDD2 = 15 V 1.1 2.3 Ω Tested at 500 mA, VDD2 = 15 V VOUT PMOS Gate Resistance1 RDSON_P 1.4 3 Ω Tested at 250 mA, VDD2 = 15 V 1.4 3 Ω Tested at 500 mA, VDD2 = 15 V VOUT_SRC NMOS Gate Resistance RDSON_N 1.1 2.3 Ω Tested at 250 mA, VDD2 = 15 V 1.1 2.3 Ω Tested at 500 mA, VDD2 = 15 V Rev. 0 | Page 3 of 18 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Electrical Specifications Regulatory Information Package Specifications Insulation and Safety Specifications DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics Recommended Operating Conditions Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Truth Table Typical Performance Characteristics Theory of Operation Applications Information PCB Layout Slew Rate Control Propagation Delay-Related Parameters Peak Current Rating Undervoltage Lockout Output Load Characteristics Power Dissipation Insulation Lifetime Typical Applications Outline Dimensions Ordering Guide