Datasheet A80601, A80601-1 (Allegro) - 6

A80601 and High Power LED Driver with Pre-Emptive Boost A80601-1 for Ultra-High Dimming Ratio and Low Output Ripple ELECTRICAL CHARACTERISTICS [1]: Unless otherwise noted, specifications are valid at VIN = 12 V, TJ = 25°C, • indicates specifica- tions guaranteed over the full operating temperature range with TJ = –40°C to 125°C, typical specifications are at TJ = 25°C Characteristics Symbol Test Conditions Min. Typ. Max. Unit INPUT VOLTAGE SPECIFICATIONS
Operating Input Voltage Range [3] VIN ● 4.5 − 40 V VIN UVLO Start Threshold VUVLO(rise) VIN rising ● − – 4.45 V VIN UVLO Stop Threshold VUVLO(fall) VIN falling ● − – 4.05 V UVLO Hysteresis [2] VUVLO_HYS 300 400 500 mV
INPUT CURRENTS
VIN Pin Operating Current I EN and PWM = H, CGATE = 1 nF from GDRV to OP PGND, fSW = 2 MHz ● − 22 32 mA VIN Pin Quiescent Current IQ EN = H and PWM = L, fCLKOUT = 2 MHz ● − 4 6 mA VIN Pin Sleep Current ISLEEP VIN = 16 V, VEN / VPWM = VSYNC = 0 V ● − 1 5 µA
INPUT LOGIC LEVELS (EN/PWM, ADIM)
Input Logic Level-Low VIL ● − − 0.4 V Input Logic Level-High VIH ● 1.5 − − V R Input Pull-Down Resistor EN, RPWM Input = 5 V 60 100 140 kΩ RADIM Input = 5 V 30 50 70 kΩ
OUTPUT LOGIC LEVELS (CLKOUT)
Output Logic Level-Low VOL 5 V < VIN < 40 V, iLOAD = 1 mA ● − − 0.3 V Output Logic Level-High VOH 5 V < VIN < 40 V, iLOAD = 1 mA ● 1.8 − − V CLKOUT Duty Cycle DCLKOUT fSW = 2 MHz, no external sync ● 33 50 67 % CLKOUT Negative Pulse Width tCLKNPW External sync = 260 kHz to 2.3 MHz − 200 − ns
ANALOG DIMMING (ADIM)
Analog Dimming Current Level iADIM50 DC 1.0 V applied to ADIM pin − 50 − % (shown as % of full-scale current) iADIM25 DC 0.5 V applied to ADIM pin 23 25 27 % APWM Frequency Range [2] fAPWM Clock signal applied to ADIM pin ● 40 − 1000 kHz APWM Duty Cycle Range [2] DAPWM Clock signal applied to ADIM pin ● 0 − 90 %
VDD REGULATOR
Regulator Output Voltage VDD VIN > 6 V, iLOAD < 1 mA 4.05 4.25 4.45 V VDD UVLO Start Threshold VDDUVLOrise VDD rising, no external load − 3.2 − V VDD UVLO Stop Threshold VDDUVLOfall VDD falling, no external load − 2.65 − V
ERROR AMPLIFIER
Amplifier Gain [2] gm VCOMP = 1.5 V − 900 − μA/V V Source Current I COMP = 1.5 V, A80601 (symm COMP) − –500 − μA EA(SRC) VCOMP = 1.5 V, A80601-1 (asymm COMP) − –700 − μA Sink Current IEA(SINK) VCOMP = 1.5 V − +500 − μA COMP Pin Pull Down Resistance RCOMP FAULT = 0, VCOMP = 1.5 V − 1.4 − kΩ Continued on the next page… Allegro MicroSystems, LLC 6 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming ADIM Mode APWM Mode Extending LED Dimming Ratio Analog Dimming with External Voltage VDD VDRV Shutdown Fault Detection and Protection FAULT Status LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Input Current Sense Resistor Input UVLO Fault Protection During Operation Package Outline Drawing Appendix: External MOSFET Selection Guide