Datasheet IM231-L6S1B / IM231-L6T2B (Infineon) - 5

CIPOS™ Micro IM231-L6S1B / IM231-L6T2B
Pin Configuration
2.2 Pin Descriptions HIN(1,2,3) and LIN(1,2,3) (Low side and high side
The IC shuts down all the gate drivers power
control pins)
outputs, when the VDD supply voltage is below VDDUV- These pins are positive logic and they are = 10.9V. This prevents the external power switches responsible for the control of the integrated IGBT. from critically low gate voltage levels during on- The Schmitt-trigger input thresholds of them are state and therefore from excessive power such to guarantee LSTTL and CMOS compatibility dissipation. down to 3.3V controller outputs. Pull-down resistor of about 800k is internally provided to pre-bias
VB(1,2,3) and VS(1,2,3) (High side supplies)
inputs during supply start-up and an ESD diode is VB to VS is the high side supply voltage. The high side provided for pin protection purposes. Input circuit can float with respect to COM following the Schmitt-trigger and noise filter provide beneficial external high side power device emitter voltage. noise rejection to short input pulses. Due to the low power consumption, the floating The noise filter suppresses control pulses which are driver stage is supplied by integrated bootstrap below the filter time TFILIN. The filter acts according circuit. to Figure 4. The under-voltage detection operates with a rising supply threshold of typical VBSUV+ = 11.1V and a falling CIPOSTM threshold of VBSUV- = 10.9V. Schmitt-Trigger V HINx INPUT NOISE S(1,2,3) provide a high robustness against negative LINx FILTER  voltage in respect of COM. This ensures very stable M 8 . 0 SWITCH LEVEL COM V designs even under rough conditions. IH; VIL
Figure 3 Input pin structure VR(1,2,3) (Low side emitters)
The low side emitters are available for current a) t b) t FILIN FILIN measurements of each phase leg. It is recommended to keep the connection to pin COM as HIN HIN LIN LIN short as possible in order to avoid unnecessary high inductive voltage drops. HO HO LO low LO
Figure 4 Input filter timing diagram VTH (Thermistor output)
A UL certified NTC resistor is integrated in the The integrated gate drive provides additionally a module with one terminal of the chip connected to shoot through prevention capability which avoids COM and the other to VTH. When pulled up to a rail the simultaneous on-state of the high-side and low- voltage such as VDD or 3.3V by a resistor, the VTH pin side switch of the same inverter phase. A minimum provides an analog voltage signal corresponding to deadtime insertion of typically 300ns is also the temperature of the thermistor. provided by driver IC, in order to reduce cross- conduction of the external power switches.
RFE (RCIN / Fault / Enable)
The RFE pin combines 3 functions in one pin: RCIN or
VDD, COM (Low side control supply and reference)
RC-network based programmable fault clear timer, VDD is the control supply and it provides power both fault output and enable input. to input logic and to the output power stage. Input logic is referenced to COM ground. The RFE pin is normally connected to an RC network on the PCB per the schematic in Figure 5. Under The under-voltage circuit enables the device to normal operating conditions, RRCIN pulls the RFE pin operate at power on when a supply voltage of at to 3.3V, thus enabling all the functions in the IPM. least a typical voltage of VDDUV+ = 11.1V is present. The microcontroller can pull this pin low to disable the IPM functionality. This is is the Enable function. Final Datasheet 5 Revision 2.0 2019-02-11 Document Outline Description Features Potential Applications Product validation Table 1 Part Ordering Table Table of contents 1 Internal Electrical Schematic 2 Pin Configuration 3 Absolute Maximum Rating 4 Thermal Characteristics 5 Recommended Operating Conditions 6 Static Parameters 7 Dynamic Parameters 8 Thermistor Characteristics 9 Mechanical Characteristics and Ratings 10 Qualification Information 11 Diagrams & Tables 12 Application Guide 13 Package Outline Revision History Disclimer