Datasheet XDPL8218 (Infineon) - 7

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XDPL8218 Digital Flyback Controller IC XDP™ Digital Power Functional description 3 Functional description
The functional description provides an overview about the integrated functions and features as well as their relationship. The mentioned parameters and equations are based on typical values at TA = 25°C. The corresponding min. and max. values are shown in the electrical characteristics.
3.1 Regulated mode
In regulated mode, the FB pin voltage is periodically sampled and digitally filtered. Based on the filtered feedback voltage VFB,filtered mapping, the mode of operation (
QRM1
,
DCM
or
ABM
) and the respective switching parameters (on-time, minimum switching period, pulse number) are selected. Whenever the regulated mode is entered after the startup phase, the filtered feedback voltage maximum limit VFB,filtered,max ramp is applied initially on the voltage mapping to prevent excessive output rise overshoot.
FB pin voltage sampling
To have a high signal-to-noise ratio, the FB pin voltage is sampled instantly after the leading edge blanking time tCS,LEB, with the sampling rate based on the mode of operation. •
QRM1
/
DCM
: With the line synchronization established, the FB pin voltage is sampled 64 times per the synchronized AC input half sine wave period. For instance, with AC input frequency of 50 Hz, the synchronized half sine wave period should be approximately 10 ms. If the line synchronization is not established while operating in these modes, for example with DC input, the sampling rate would be 64 times per 9.823 ms. •
ABM
: During
ABM
sleep, the FB pin voltage cannot be sampled as the FB pin internal pull-up is deactivated in power saving mode PSMD2. During
ABM
active time, the pull-up is re-enabled at a timing (based on nwakeup parameter) before the start of both burst pulsing and FB pin voltage sampling. If the line synchronization was established before
ABM
entering, the sampling rate during burst pulsing would be 64 times per the last synchronized AC input half sine wave period. Otherwise, it would be 64 times per 9.823 ms.
Feedback voltage filtering
The filtering of the sampled feedback voltage depends on the mode of operation: •
QRM1
/
DCM
: After the controller is synchronized to the AC input half sine wave period for at least a duration based on nnotch,blank parameter, the sampled feedback voltage is processed by a digital notch-filter with quality factor based on Nquality parameter, to suppress the double AC input frequency component of the feedback voltage. The notch filter has a transfer function of: N s = s2 + ω2 with ω = 2π 2 ⋅ 2fline s2 + ω N s + ω quality
Equation 1
Whenever the condition above for notch filter activation is not met, the sampled feedback voltage is processed by a digital low pass filter. This low pass filter reduces the high frequency component, but cannot suppress the double AC input frequency component of the feedback voltage. •
ABM
: In this mode, the sampled feedback voltage is processed by a digital low pass filter during the
ABM
burst pulsing, to reduce the high frequency component.
Filtered feedback voltage mapping Figure 4
shows how the filtered feedback voltage VFB,filtered is mapped to the mode of operation (
QRM1
,
DCM
,
ABM
) and switching parameters (on-time, minimum switching period, pulse number). Datasheet 7 Revision 1.0 2018-06-06 Document Outline Features Product validation Potential applications Description Table of contents 1 Pin configuration 2 Functional block diagram 3 Functional description 3.1 Regulated mode 3.2 Configurable gate voltage rising slope at GD pin 3.3 Startup 3.4 Line synchronization 3.5 Input voltage and output voltage estimation 3.5.1 Output voltage estimation 3.5.2 Input voltage estimation 3.6 Power factor correction 3.7 Protection features 3.7.1 Primary MOSFET overcurrent protection 3.7.2 Output undervoltage protection 3.7.3 Output overvoltage protection 3.7.4 Transformer demagnetization time shortage protection 3.7.5 Minimum input voltage startup check and input undervoltage protection 3.7.6 Maximum input voltage startup check and input overvoltage protection 3.7.7 VCC undervoltage lockout 3.7.8 VCC undervoltage protection 3.7.9 VCC overvoltage protection 3.7.10 IC overtemperature protection 3.7.11 Other protections 3.7.12 Protection reactions 3.8 Debug mode 4 List of Parameters 5 Electrical Characteristics and Parameters 5.1 Package Characteristics 5.2 Absolute Maximum Ratings 5.3 Operating Conditions 5.4 DC Electrical Characteristics 6 Package Dimensions 7 References Revision History Glossary ABM CCM CRC CV DCM ECG EMI GUI IC LED OCP1 PC PF PFC QRM1 SSR THD UART USB UVLO Disclaimer