Datasheet LT1964 (Analog Devices) - 10

HerstellerAnalog Devices
Beschreibung200mA, Low Noise, Low Dropout Negative Micropower Regulator
Seiten / Seite16 / 10 — PIN FUNCTIONS. ADJ (Adjustable Devices only):. OUT:. BYP:. SHDN:. Exposed …
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PIN FUNCTIONS. ADJ (Adjustable Devices only):. OUT:. BYP:. SHDN:. Exposed Pad (DFN Package Only):. GND:. IN:

PIN FUNCTIONS ADJ (Adjustable Devices only): OUT: BYP: SHDN: Exposed Pad (DFN Package Only): GND: IN:

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LT1964
PIN FUNCTIONS ADJ (Adjustable Devices only):
For the Adjustable LT1964,
OUT:
The Output Supplies Power to the Load. A minimum this is the Input to the Error Amplifi er. The ADJ pin has a output capacitor of 1μF is required to prevent oscillations. bias current of 30nA that fl ows out of the pin. The ADJ pin Larger output capacitors will be required for applications voltage is –1.22V referenced to ground, and the output with large transient loads to limit peak voltage transients. voltage range is –1.22V to –20V. A parasitic diode exists A parasitic diode exists between the output and the input. between the ADJ pin and the input of the LT1964. The ADJ The output cannot be pulled more negative than the input pin cannot be pulled more negative than the input during during normal operation, or more than 0.5V below the input normal operation, or more than 0.5V more negative than during a fault condition. See the Applications Information the input during a fault condition. section for more information on output capacitance and reverse output characteristics.
BYP:
The BYP Pin is used to Bypass the Reference of the LT1964 to Achieve Low Noise Performance from the
SHDN:
The SHDN Pin is used to put the LT1964 into a Low Regulator. A small capacitor from the output to this pin Power Shutdown State. The SHDN pin is referenced to will bypass the reference to lower the output voltage noise. the GND pin for regulator control, allowing the LT1964 to A maximum value of 0.01μF can be used for reducing be driven by either positive or negative logic. The output output voltage noise to a typical 30μVRMS over a 10Hz of the LT1964 will be off when the SHDN pin is pulled to 100kHz bandwidth. If not used, this pin must be left within ±0.8V of GND. Pulling the SHDN pin more than unconnected. –1.9V or +1.6V will turn the LT1964 on. The SHDN pin can be driven by 5V logic or open collector logic with a
Exposed Pad (DFN Package Only):
IN. Connect to IN pull-up resistor. The pull-up resistor is required to supply (Pins 7, 8) at the PCB. the pull-up current of the open collector gate, normally
GND:
Ground. several microamperes, and the SHDN pin current, typi-
IN:
Power is Supplied to the Device Through the Input Pin. cally 3μA out of the pin (for negative logic) or 6μA into A bypass capacitor is required on this pin if the device the pin (for positive logic). If unused, the SHDN pin must is more than six inches away from the main input fi lter be connected to VIN. The device will be shut down if the capacitor. In general, the output impedance of a battery SHDN pin is open circuit. For the LT1964-BYP, the SHDN rises with frequency, so it is advisable to include a bypass pin is internally connected to VIN. A parasitic diode exists capacitor in battery-powered circuits. A bypass capacitor between the SHDN pin and the input of the LT1964. The in the range of 1μF to 10μF is suffi cient. SHDN pin cannot be pulled more negative than the input during normal operation, or more than 0.5V below the input during a fault condition. 1964fb 10