Datasheet ADSP-BF522C, ADSP-BF523C, ADSP-BF524C, ADSP-BF525C, ADSP-BF526C, ADSP-BF527C (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | Blackfin Embedded Processor with Codec |
| Seiten / Seite | 36 / 9 — Normal Mode. Table 1. Sampling Rate Lookup Table, Normal Mode (USB … |
| Revision | A |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
Normal Mode. Table 1. Sampling Rate Lookup Table, Normal Mode (USB Disabled). CODEC_MCLK CODEC_MCLK ADC Sampling Rate
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link to page 9 ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C
Normal Mode
In normal mode, the codec supports digital audio sampling the SR control bits (Register R8, Bit D2 to Bit D5) and match rates from 8 kHz to 96 kHz. Normal mode supports 256 × fS and this selection to the core clock frequency that is pulsed on the 384 × fS based clocks. To select the desired sampling rate, the CODEC_MCLK pin. See Table 1 for sampling rates in programmer must set the appropriate sampling rate register in normal mode.
Table 1. Sampling Rate Lookup Table, Normal Mode (USB Disabled) CODEC_MCLK CODEC_MCLK ADC Sampling Rate DAC Sampling Rate USB SR [3:0] BOSR CODEC_BCLK (CLKDIV2 = 0) (CLKDIV2 = 1) (ADCLRC) (DACLRC) (MS = 1)1
12.288 MHz 24.576 MHz 8 kHz (CODEC_MCLK/1536) 8 kHz (CODEC_MCLK/1536) 0 0011 0 CODEC_MCLK/4 8 kHz (CODEC_MCLK/1536) 48 kHz (CODEC_MCLK/256) 0 0010 0 CODEC_MCLK/4 12 kHz (CODEC_MCLK/1024) 12 kHz (CODEC_MCLK/1024) 0 0100 0 CODEC_MCLK/4 16 kHz (CODEC_MCLK/768) 16 kHz (CODEC_MCLK/768) 0 0101 0 CODEC_MCLK/4 24 kHz (CODEC_MCLK/512) 24 kHz (CODEC_MCLK/512) 0 1110 0 CODEC_MCLK/4 32 kHz (CODEC_MCLK/384) 32 kHz (CODEC_MCLK/384) 0 0110 0 CODEC_MCLK/4 48 kHz (CODEC_MCLK/256) 8 kHz (CODEC_MCLK/1536) 0 0001 0 CODEC_MCLK/4 48 kHz (CODEC_MCLK/256) 48 kHz (CODEC_MCLK/256) 0 0000 0 CODEC_MCLK/4 96 kHz (CODEC_MCLK/128) 96 kHz (CODEC_MCLK/128) 0 0111 0 CODEC_MCLK/2 11.2896 MHz 22.5792 MHz 8.0182 kHz (CODEC_MCLK/1408) 8.0182 kHz (CODEC_MCLK/1408) 0 1011 0 CODEC_MCLK/4 8.0182 kHz (CODEC_MCLK/1408) 44.1 kHz (CODEC_MCLK/256) 0 1010 0 CODEC_MCLK/4 11.025 kHz (CODEC_MCLK/1024) 11.025 kHz (CODEC_MCLK/1024) 0 1100 0 CODEC_MCLK/4 22.05 kHz (CODEC_MCLK/512) 22.05 kHz (CODEC_MCLK/512) 0 1101 0 CODEC_MCLK/4 44.1 kHz (CODEC_MCLK/256) 8.0182 kHz (CODEC_MCLK/1408) 0 1001 0 CODEC_MCLK/4 44.1 kHz (CODEC_MCLK/256) 44.1 kHz (CODEC_MCLK/256) 0 1000 0 CODEC_MCLK/4 88.2 kHz (CODEC_MCLK/128) 88.2 kHz (CODEC_MCLK/128) 0 1111 0 CODEC_MCLK/2 18.432 MHz 36.864 MHz 8 kHz (CODEC_MCLK/2304) 8 kHz (CODEC_MCLK/2304) 0 0011 1 CODEC_MCLK/6 8 kHz (CODEC_MCLK/2304) 48 kHz (CODEC_MCLK/384) 0 0010 1 CODEC_MCLK/6 12 kHz (CODEC_MCLK/1536) 12 kHz (CODEC_MCLK/1536) 0 0100 1 CODEC_MCLK/6 16 kHz (CODEC_MCLK/1152) 16 kHz (CODEC_MCLK/1152) 0 0101 1 CODEC_MCLK/6 24 kHz (CODEC_MCLK/768) 24 kHz (CODEC_MCLK/768) 0 1110 1 CODEC_MCLK/6 32 kHz (CODEC_MCLK/576) 32 kHz (CODEC_MCLK/576) 0 0110 1 CODEC_MCLK/6 48 kHz (CODEC_MCLK/384) 48 kHz (CODEC_MCLK/384) 0 0000 1 CODEC_MCLK/6 48 kHz (CODEC_MCLK/384) 8 kHz (CODEC_MCLK/2304) 0 0001 1 CODEC_MCLK/6 96 kHz (CODEC_MCLK/192) 96 kHz (CODEC_MCLK/192) 0 0111 1 CODEC_MCLK/3 16.9344 MHz 33.8688 MHz 8.0182 kHz (CODEC_MCLK/2112) 8.0182 kHz (CODEC_MCLK/2112) 0 1011 1 CODEC_MCLK/6 8.0182 kHz (CODEC_MCLK/2112) 44.1 kHz (CODEC_MCLK/384) 0 1010 1 CODEC_MCLK/6 11.025 kHz (CODEC_MCLK/1536) 11.025 kHz (CODEC_MCLK/1536) 0 1100 1 CODEC_MCLK/6 22.05 kHz (CODEC_MCLK/768) 22.05 kHz (CODEC_MCLK/768) 0 1101 1 CODEC_MCLK/6 44.1 kHz (CODEC_MCLK/384) 8.0182 kHz (CODEC_MCLK/2112) 0 1001 1 CODEC_MCLK/6 44.1 kHz (CODEC_MCLK/384) 44.1 kHz (CODEC_MCLK/384) 0 1000 1 CODEC_MCLK/6 88.2 kHz (CODEC_MCLK/192) 88.2 kHz (CODEC_MCLK/192) 0 1111 1 CODEC_MCLK/3 1 CODEC_BCLK frequency is for master mode and slave right-justified mode only. Rev. A | Page 9 of 36 | March 2010 Document Outline Blackfin Embedded Processor with Codec Processor Features Embedded Codec Features Peripherals Table of Contents Revision History General Description Codec Description ADC and DAC ADC High-Pass and DAC De-Emphasis Filters Analog Audio Interfaces Stereo Line and Monaural Microphone Inputs Bypass and Sidetone Paths to Output Line and Headphone Outputs Digital Audio Interface Recording Mode Playback Mode Digital Audio Data Sampling Rate Normal Mode USB Mode Software Control Interface Codec Pin Descriptions Register Details Bit Descriptions Specifications Operating Conditions Codec Electrical Characteristics Absolute Maximum Ratings ESD Sensitivity Package Information Power Consumption Timing Specifications TWI Timing SPI Timing Digital Audio Interface Slave Mode Timing Digital Audio Interface Master Mode Timing System Clock Timing Digital Filter Characteristics Converter Filter Response Digital De-Emphasis 289-Ball CSP_BGA Ball Assignment Outline Dimensions Ordering Guide
Normal Mode
In normal mode, the codec supports digital audio sampling the SR control bits (Register R8, Bit D2 to Bit D5) and match rates from 8 kHz to 96 kHz. Normal mode supports 256 × fS and this selection to the core clock frequency that is pulsed on the 384 × fS based clocks. To select the desired sampling rate, the CODEC_MCLK pin. See Table 1 for sampling rates in programmer must set the appropriate sampling rate register in normal mode.
Table 1. Sampling Rate Lookup Table, Normal Mode (USB Disabled) CODEC_MCLK CODEC_MCLK ADC Sampling Rate DAC Sampling Rate USB SR [3:0] BOSR CODEC_BCLK (CLKDIV2 = 0) (CLKDIV2 = 1) (ADCLRC) (DACLRC) (MS = 1)1
12.288 MHz 24.576 MHz 8 kHz (CODEC_MCLK/1536) 8 kHz (CODEC_MCLK/1536) 0 0011 0 CODEC_MCLK/4 8 kHz (CODEC_MCLK/1536) 48 kHz (CODEC_MCLK/256) 0 0010 0 CODEC_MCLK/4 12 kHz (CODEC_MCLK/1024) 12 kHz (CODEC_MCLK/1024) 0 0100 0 CODEC_MCLK/4 16 kHz (CODEC_MCLK/768) 16 kHz (CODEC_MCLK/768) 0 0101 0 CODEC_MCLK/4 24 kHz (CODEC_MCLK/512) 24 kHz (CODEC_MCLK/512) 0 1110 0 CODEC_MCLK/4 32 kHz (CODEC_MCLK/384) 32 kHz (CODEC_MCLK/384) 0 0110 0 CODEC_MCLK/4 48 kHz (CODEC_MCLK/256) 8 kHz (CODEC_MCLK/1536) 0 0001 0 CODEC_MCLK/4 48 kHz (CODEC_MCLK/256) 48 kHz (CODEC_MCLK/256) 0 0000 0 CODEC_MCLK/4 96 kHz (CODEC_MCLK/128) 96 kHz (CODEC_MCLK/128) 0 0111 0 CODEC_MCLK/2 11.2896 MHz 22.5792 MHz 8.0182 kHz (CODEC_MCLK/1408) 8.0182 kHz (CODEC_MCLK/1408) 0 1011 0 CODEC_MCLK/4 8.0182 kHz (CODEC_MCLK/1408) 44.1 kHz (CODEC_MCLK/256) 0 1010 0 CODEC_MCLK/4 11.025 kHz (CODEC_MCLK/1024) 11.025 kHz (CODEC_MCLK/1024) 0 1100 0 CODEC_MCLK/4 22.05 kHz (CODEC_MCLK/512) 22.05 kHz (CODEC_MCLK/512) 0 1101 0 CODEC_MCLK/4 44.1 kHz (CODEC_MCLK/256) 8.0182 kHz (CODEC_MCLK/1408) 0 1001 0 CODEC_MCLK/4 44.1 kHz (CODEC_MCLK/256) 44.1 kHz (CODEC_MCLK/256) 0 1000 0 CODEC_MCLK/4 88.2 kHz (CODEC_MCLK/128) 88.2 kHz (CODEC_MCLK/128) 0 1111 0 CODEC_MCLK/2 18.432 MHz 36.864 MHz 8 kHz (CODEC_MCLK/2304) 8 kHz (CODEC_MCLK/2304) 0 0011 1 CODEC_MCLK/6 8 kHz (CODEC_MCLK/2304) 48 kHz (CODEC_MCLK/384) 0 0010 1 CODEC_MCLK/6 12 kHz (CODEC_MCLK/1536) 12 kHz (CODEC_MCLK/1536) 0 0100 1 CODEC_MCLK/6 16 kHz (CODEC_MCLK/1152) 16 kHz (CODEC_MCLK/1152) 0 0101 1 CODEC_MCLK/6 24 kHz (CODEC_MCLK/768) 24 kHz (CODEC_MCLK/768) 0 1110 1 CODEC_MCLK/6 32 kHz (CODEC_MCLK/576) 32 kHz (CODEC_MCLK/576) 0 0110 1 CODEC_MCLK/6 48 kHz (CODEC_MCLK/384) 48 kHz (CODEC_MCLK/384) 0 0000 1 CODEC_MCLK/6 48 kHz (CODEC_MCLK/384) 8 kHz (CODEC_MCLK/2304) 0 0001 1 CODEC_MCLK/6 96 kHz (CODEC_MCLK/192) 96 kHz (CODEC_MCLK/192) 0 0111 1 CODEC_MCLK/3 16.9344 MHz 33.8688 MHz 8.0182 kHz (CODEC_MCLK/2112) 8.0182 kHz (CODEC_MCLK/2112) 0 1011 1 CODEC_MCLK/6 8.0182 kHz (CODEC_MCLK/2112) 44.1 kHz (CODEC_MCLK/384) 0 1010 1 CODEC_MCLK/6 11.025 kHz (CODEC_MCLK/1536) 11.025 kHz (CODEC_MCLK/1536) 0 1100 1 CODEC_MCLK/6 22.05 kHz (CODEC_MCLK/768) 22.05 kHz (CODEC_MCLK/768) 0 1101 1 CODEC_MCLK/6 44.1 kHz (CODEC_MCLK/384) 8.0182 kHz (CODEC_MCLK/2112) 0 1001 1 CODEC_MCLK/6 44.1 kHz (CODEC_MCLK/384) 44.1 kHz (CODEC_MCLK/384) 0 1000 1 CODEC_MCLK/6 88.2 kHz (CODEC_MCLK/192) 88.2 kHz (CODEC_MCLK/192) 0 1111 1 CODEC_MCLK/3 1 CODEC_BCLK frequency is for master mode and slave right-justified mode only. Rev. A | Page 9 of 36 | March 2010 Document Outline Blackfin Embedded Processor with Codec Processor Features Embedded Codec Features Peripherals Table of Contents Revision History General Description Codec Description ADC and DAC ADC High-Pass and DAC De-Emphasis Filters Analog Audio Interfaces Stereo Line and Monaural Microphone Inputs Bypass and Sidetone Paths to Output Line and Headphone Outputs Digital Audio Interface Recording Mode Playback Mode Digital Audio Data Sampling Rate Normal Mode USB Mode Software Control Interface Codec Pin Descriptions Register Details Bit Descriptions Specifications Operating Conditions Codec Electrical Characteristics Absolute Maximum Ratings ESD Sensitivity Package Information Power Consumption Timing Specifications TWI Timing SPI Timing Digital Audio Interface Slave Mode Timing Digital Audio Interface Master Mode Timing System Clock Timing Digital Filter Characteristics Converter Filter Response Digital De-Emphasis 289-Ball CSP_BGA Ball Assignment Outline Dimensions Ordering Guide