Datasheet MAX4322, MAX432, MAX4326, MAX4327, MAX4329 (Maxim) - 9

Single/Dual/Quad, Low-Cost, UCSP/SOT23, Low-Power, Rail-to-Rail I/O Op Amps MAX4322/MAX4323/MAX4326/MAX4327/MAX4329 __________ Applications Information
Since the input stage switches between the NPN and PNP pairs, the input bias current changes polarity as
Rail-to-Rail Input Stage
the input voltage passes through the transition region. Devices in the MAX4322/MAX4323/MAX4326/MAX4327/ To reduce the offset error caused by input bias cur- MAX4329 family of high-speed amplifiers have rail-to- rents flowing through external source impedances, rail input and output stages designed for low-voltage, match the effective impedance seen by each input single-supply operation. The input stage consists of (Figures 1a, 1b). High-source impedances, together separate NPN and PNP differential stages, which com- with the input capacitance, can create a parasitic pole bine to provide an input common-mode range extend- that produces an underdamped signal response. ing to the supply rails. The PNP stage is active for input Reducing the input impedance or placing a small (2pF voltages close to the negative rail, and the NPN stage to 10pF) capacitor across the feedback resistor is active for input voltages near the positive rail. The improves the response. input offset voltage is typically below 250µV. The The MAX4322/MAX4323/MAX4326/MAX4327/MAX4329s’ switchover transition region, which occurs near VCC/2, inputs are protected from large differential input voltages has been extended to minimize the slight degradation in by 1kΩ series resistors and back-to-back triple diodes CMRR caused by the mismatch of the input pairs. Their across the inputs (Figure 2). For differential input volt- low offset voltage, high bandwidth, and rail-to-rail ages less than 1.8V, the input resistance is typically common-mode range make these op amps excellent 500kΩ. For differential input voltages greater than 1.8V, choices for precision, low-voltage, data-acquisition the input resistance is approximately 2kΩ, and the input systems. bias current is determined by the following equation: R3 R3 MAX4322/MAX4323 MAX4322/MAX4323 MAX4326/MAX4327 MAX4326/MAX4327 MAX4329 MAX4329 R1 R2 R1 R2 R3 = R1 R2 R3 = R1 R2 Figure 1a. Reducing Offset Error Due to Bias Current Figure 1b. Reducing Offset Error Due to Bias Current (Noninverting) (Inverting) 1kΩ 1kΩ Figure 2. Input Protection Circuit
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