LTC3811 ELECTRICAL CHARACTERISTICSThe ● denotes the specifi cations which apply over the full operatingjunction temperature range, otherwise specifi cations are at TJ = 25°C. VIN = 12V, MODE/SYNC = 0V, unless otherwise specifi ed.SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITSDRVCC Linear Regulator VDRVCC LDO Regulator Output Voltage VEXTVCC = 0V ● 5.6 6.0 6.4 V ΔVDRVCC(LOAD) DRVCC Load Regulation ILOAD = 0mA to 50mA –2.0 –0.5 % ΔVDRVCC(LINE) DRVCC Line Regulation ΔVIN = 8.5V to 30V 0.01 0.2 %/V VDRVCC(UVLO) LDO Regulator Undervoltage Threshold DRVCC Rising 3.7 V VDRVCC(HYST) LDO Regulator Undervoltage Hysteresis 0.56 V VEXTVCC EXTVCC Switchover Voltage IDRVCC = 20mA, EXTVCC Rising 4.5 V VEXTVCC(HYST) EXTVCC Switchover Hysteresis IDRVCC = 20mA 400 mV VEXTVCC(DROP) EXTVCC Voltage Drop IDRVCC = 20mA, VEXTVCC = 5V 100 mV Gate Drivers tr (TG1, TG2) Top Gate Rise Time CL = 3300pF (Note 6) 20 ns tf (TG1, TG2) Top Gate Fall Time CL = 3300pF (Note 6) 10 ns tr (BG1, BG2) Bottom Gate Rise Time CL = 3300pF (Note 6) 20 ns tf (BG1, BG2) Bottom Gate Fall Time CL = 3300pF (Note 6) 10 ns RDS(ON)(TG) Top Gate Pull-Down NMOS TG to SW 0.9 Ω TG1, TG2 On-Resistance RDS(ON)(BG) Bottom Gate Pull-Down NMOS BG to PGND 0.9 Ω BG1, BG2 On-Resistance IPK(TG) TG1, TG2 Top Gate (TG) Peak Source Current 1.0 A IPK(BG) BG1, BG2 Bottom Gate (BG) Peak Source Current 1.0 A tDEAD1 Bottom Gate Off to Top Gate On (Note 6) 30 ns Deadtime tDEAD2 Top Gate Off to Bottom Gate On (Note 6) 30 ns Deadtime tON(MIN) Minimum On-Time VCOMP = 1.25V (Note 6, 7) 65 ns Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 6: Guaranteed by design, not subject to test. may cause permanent damage to the device. Exposure to any Absolute Note 7: The minimum on-time condition corresponds to an inductor peak- Maximum Rating condition for extended periods may affect device to-peak ripple current of 50% of IMAX. See Applications Information for reliability and lifetime. Unless otherwise specifi ed, all voltages are relative more details. to SGND and all currents are positive into a pin. Note 8: The voltage positioning amplifi er operates as a transconductance Note 2: The LTC3811E is guaranteed to meet performance specifi cations amplifi er, where the input voltages are the SENSE+ to SENSE– potentials from 0°C to 85°C temperature. Specifi cations over the –40°C to for both channels. The amplifi er output current fl ows through an external 85°C operating junction temperature range are assured by design, resistor in order to program the amount of voltage droop at full load. characterization and correlation with statistical process controls. Note 9: The PHASEMODE function is only available in the QFN package. Note 3: TJ is calculated from the ambient temperature TA and power The 36-lead GW package has a fi xed channel 1-to-channel 2 phase dissipation PD according to the following formula: relationship of 180°C and a channel 1-to-CLKOUT phase relationship of TJ = TA + (PD • TBD°C/W) 90°C. The version in the 36-lead GW package is therefore optimized for Note 4: The dynamic input supply current is higher due to power 2- and 4-phase operation. MOSFET gate charging (QG • fOSC). See Applications Information for more Note 10: Rise and fall times are measured at 10% and 90% levels. information. Note 5: The error amplifi ers are measured in a feedback loop using an external servo operational amplifi er that drives the VFB pin and regulates VCOMP to be equal to the external control voltage. 3811f 5