Datasheet LTC3858 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungLow IQ, Dual 2-Phase Synchronous Step-Down Controller
Seiten / Seite38 / 9 — PIN FUNCTIONS. RUN1, RUN2 (Pin 7, Pin 8):. SW1, SW2 (Pin 25, Pin 16):. …
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PIN FUNCTIONS. RUN1, RUN2 (Pin 7, Pin 8):. SW1, SW2 (Pin 25, Pin 16):. TG1, TG2 (Pin 26, Pin 15):. ILIM (Pin 28):

PIN FUNCTIONS RUN1, RUN2 (Pin 7, Pin 8): SW1, SW2 (Pin 25, Pin 16): TG1, TG2 (Pin 26, Pin 15): ILIM (Pin 28):

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LTC3858
PIN FUNCTIONS RUN1, RUN2 (Pin 7, Pin 8):
Digital Run Control Inputs for
SW1, SW2 (Pin 25, Pin 16):
Switch Node Connections Each Controller. Forcing either of these pins below 1.2V to Inductors. shuts down that controller. Forcing both of these pins below
TG1, TG2 (Pin 26, Pin 15):
High Current Gate Drives for 0.7V shuts down the entire LTC3858, reducing quiescent Top N-Channel MOSFETs. These are the outputs of fl oat- current to approximately 8μA. Do NOT fl oat these pins. ing drivers with a voltage swing equal to INTVCC – 0.5V
ILIM (Pin 28):
Current Comparator Sense Voltage Range superimposed on the switch node voltage SW. Inputs. Tying this pin to SGND, FLOAT or INTVCC sets the
PGOOD1, PGOOD2 (Pin 27, Pin 14):
Open-Drain Logic maximum current sense threshold to one of three different Output. PGOOD1,2 is pulled to ground when the voltage levels for both comparators. on the VFB1,2 pin is not within ±10% of its set point.
INTVCC (Pin 19):
Output of the Internal Linear Low Dropout
SS1, SS2 (Pin 29, Pin 13):
External Soft-Start Input. The Regulator. The driver and control circuits are powered LTC3858 regulates the V from this voltage source. Must be decoupled to power FB1,2 voltage to the smaller of 0.8V or the voltage on the SS1,2 pin. An internal 1μA pull-up ground with a minimum of 4.7μF ceramic or other low current source is connected to this pin. A capacitor to ESR capacitor. Do not use the INTVCC pin for any other ground at this pin sets the ramp time to fi nal regulated purpose. output voltage. This pin is also used as the short-circuit
EXTVCC (Pin 20):
External Power Input to an Internal LDO latchoff timer. Connected to INTVCC. This LDO supplies INTVCC power,
I
bypassing the internal LDO powered from V
TH1, ITH2 (Pin 30, Pin 12):
Error Amplifi er Outputs and IN whenever Switching Regulator Compensation Points. Each associ- EXTVCC is higher than 4.7V. See EXTVCC Connection in ated channel’s current comparator trip point increases the Applications Information section. Do not exceed 14V with this control voltage. on this pin.
V PGND (Pin 21):
Driver Power Ground. Connects to the
FB1, VFB2 (Pin 31, Pin 11):
Receives the remotely sensed feedback voltage for each controller from an external sources of bottom (synchronous) N-channel MOSFETs resistive divider across the output. and the (–) terminal(s) of CIN.
SENSE1+, SENSE2+ (Pin 32, Pin 10):
The (+) Input to
VIN (Pin 22):
Main Input Supply Pin. A bypass capacitor the differential current comparators that are normally should be tied between this pin and the signal ground connected to inductor DCR sensing networks or current pin. sensing resistors. The ITH pin voltage and controlled offsets
BG1, BG2 (Pin 23, Pin 18):
High Current Gate Drives between the SENSE– and SENSE+ pins in conjunction with for Bottom (Synchronous) N-Channel MOSFETs. Voltage RSENSE set the current trip threshold. swing at these pins is from ground to INTVCC.
BOOST1, BOOST2 (Pin 24, Pin 17):
Bootstrapped Supplies to the Topside Floating Drivers. Capacitors are connected between the BOOST and SW pins and Schottky diodes are tied between the BOOST and INTVCC pins. Voltage swing at the BOOST pins is from INTVCC to (VIN + INTVCC). 3858fc 9