Datasheet LTC3865, LTC3865-1 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | Dual, 2-Phase Synchronous DC/DC Controller with Pin Selectable Outputs |
| Seiten / Seite | 38 / 10 — PIN FUNCTIONS (QFN/TSSOP). MODE/PLLIN (Pin 27/Pin 36):. SENSE1+, SENSE2+ … |
| Dateiformat / Größe | PDF / 415 Kb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS (QFN/TSSOP). MODE/PLLIN (Pin 27/Pin 36):. SENSE1+, SENSE2+ (Pins 31, 10/Pins 2, 16):
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LTC3865/LTC3865-1
PIN FUNCTIONS (QFN/TSSOP) MODE/PLLIN (Pin 27/Pin 36):
Force Continuous Mode,
SENSE1+, SENSE2+ (Pins 31, 10/Pins 2, 16):
Current Burst Mode or Pulse-Skip Mode Selection Pin and External Sense Comparator Inputs. The (+) inputs to the current Synchronization Input to Phase Detector Pin. Connect this comparators are normally connected to DCR sensing pin to SGND to force both channels in continuous mode of networks or current sensing resistors. operation. Connect to INTVCC to enable pulse-skip mode of
SENSE1–, SENSE2– (Pins 32, 9/Pin 3, 15):
Current Sense operation. Leaving the pin fl oating will enable Burst Mode Comparator Inputs. The (–) inputs to the current compara- operation. A clock on the pin will force the controller into tors are connected to the outputs. continuous mode of operation and synchronize the internal oscillator with the clock on this pin.
SGND (Pin 33/Pin 8):
Signal Ground. All small-signal components and compensation components should
FREQ (Pin 29/Pin 38):
This pin sets the frequency of the connect to this ground, which in turn connects to PGND internal oscillator. A constant current of 7.5μA is fl owing at one point. Pin 33 is the Exposed Pad and available for out of this pin and a resistor connected to this pin sets QFN package. its DC voltage, which in turn, sets the frequency of the internal oscillator.
SGND (Exposed Pad Pin 33/ Exposed Pad Pin 39):
Signal Ground. Must be soldered to PCB, providing a local ground
RUN1, RUN2 (Pins 30, 11/Pins 1, 17):
Run Control for the control components of the IC, and be tied to the Inputs. A voltage above 1.22V on either pin turns on the IC. PGND pin under the IC. However, forcing either of these pins below 1.22V causes the IC to shut down the circuitry required for that particular
PGND1, PGND2 (NA/Pins 32, 26):
Power Ground Pin. channel. There are 1μA pull-up currents for these pins. Connect this pin closely to the sources of the bottom Once the RUN pin rises above 1.22V, an additional 4.5μA N-channel MOSFETs, the (–) terminal of CVCC and the (–) pull-up current is added to the pin. terminal of CIN. 3865fb 10
PIN FUNCTIONS (QFN/TSSOP) MODE/PLLIN (Pin 27/Pin 36):
Force Continuous Mode,
SENSE1+, SENSE2+ (Pins 31, 10/Pins 2, 16):
Current Burst Mode or Pulse-Skip Mode Selection Pin and External Sense Comparator Inputs. The (+) inputs to the current Synchronization Input to Phase Detector Pin. Connect this comparators are normally connected to DCR sensing pin to SGND to force both channels in continuous mode of networks or current sensing resistors. operation. Connect to INTVCC to enable pulse-skip mode of
SENSE1–, SENSE2– (Pins 32, 9/Pin 3, 15):
Current Sense operation. Leaving the pin fl oating will enable Burst Mode Comparator Inputs. The (–) inputs to the current compara- operation. A clock on the pin will force the controller into tors are connected to the outputs. continuous mode of operation and synchronize the internal oscillator with the clock on this pin.
SGND (Pin 33/Pin 8):
Signal Ground. All small-signal components and compensation components should
FREQ (Pin 29/Pin 38):
This pin sets the frequency of the connect to this ground, which in turn connects to PGND internal oscillator. A constant current of 7.5μA is fl owing at one point. Pin 33 is the Exposed Pad and available for out of this pin and a resistor connected to this pin sets QFN package. its DC voltage, which in turn, sets the frequency of the internal oscillator.
SGND (Exposed Pad Pin 33/ Exposed Pad Pin 39):
Signal Ground. Must be soldered to PCB, providing a local ground
RUN1, RUN2 (Pins 30, 11/Pins 1, 17):
Run Control for the control components of the IC, and be tied to the Inputs. A voltage above 1.22V on either pin turns on the IC. PGND pin under the IC. However, forcing either of these pins below 1.22V causes the IC to shut down the circuitry required for that particular
PGND1, PGND2 (NA/Pins 32, 26):
Power Ground Pin. channel. There are 1μA pull-up currents for these pins. Connect this pin closely to the sources of the bottom Once the RUN pin rises above 1.22V, an additional 4.5μA N-channel MOSFETs, the (–) terminal of CVCC and the (–) pull-up current is added to the pin. terminal of CIN. 3865fb 10