Datasheet ADP1850 (Analog Devices) - 3

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Data Sheet ADP1850 SPECIFICATIONS
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). VIN = 12 V. The specifications are valid for TJ = −40°C to +125°C, unless otherwise specified. Typical values are at TA = 25°C.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY Input Voltage V 2.75 20 V IN Undervoltage Lockout Threshold IN V rising 2.45 2.6 2.75 V UVLO IN V falling 2.4 2.5 2.6 IN Undervoltage Lockout Hysteresis 0.1 V Quiescent Current I EN1 = EN2 = V = 12 V, V = V in PWM mode 4.5 5.8 IN IN FB CCO mA (no switching) EN1 = EN2 = V = 12 V, V = V in PSM mode 2.8 IN FB CCO mA Shutdown Current I EN1 = EN2 = GND, V = 5.5 V or 20 V 100 200 IN_SD IN µA ERROR AMPLIFIER FBx Input Bias Current I −100 +1 +100 nA FB Transconductance G Sink or source 1 µA 385 550 715 µS m TRK1, TRK2 Input Bias Current I 0 V ≤ V /V ≤ 5 V −100 +1 +100 nA TRK TRK1 TRK2 CURRENT SENSE AMPLIFIER GAIN A Gain resistor connected to DLx, 2.4 3 3.6 V/V CS R = 47 kΩ ± 5% CSG Gain resistor connected to DLx, 5.2 6 6.9 V/V R = 22 kΩ ± 5% CSG Default setting, R = open 10.5 12 13.5 V/V CSG Gain resistor connected to DLx, 20.5 24 26.5 V/V R = 100 kΩ ± 5% CSG OUTPUT CHARACTERICTISTICS Feedback Accuracy Voltage V FB T = −40°C to +85°C, V = 0.6 V −0.85% +0.6 +0.85% V J FB T = −40°C to +125°C, V = 0.6 V −1.5% +0.6 +1.5% V J FB Line Regulation of PWM V /V ±0.015 %/V FB IN Load Regulation of PWM V /V V range = 0.9 V to 2.2 V ±0.3 % FB COMP COMP OSCILLATOR Frequency f R = 340 kΩ to AGND 170 200 235 kHz SW FREQ R = 78.7 kΩ to AGND 720 800 880 kHz FREQ R = 39.2 kΩ to AGND 1275 1500 1725 kHz FREQ FREQ to AGND 235 300 345 kHz FREQ to VCCO 475 600 690 kHz SYNC Input Frequency Range f f = 2 × f 400 3000 kHz SYNC SYNC SW SYNC Input Pulse Width t 100 ns SYNCMIN SYNC Pin Capacitance to GND C 5 pF SYNC LINEAR REGULATOR VCCO Output Voltage I = 100 mA 4.7 5.0 5.3 V VCCO VCCO Load Regulation I = 0 mA to 100 mA, 35 mV VCCO VCCO Line Regulation V = 5.5 V to 20 V, I = 20 mA 10 mV IN VCCO VCCO Current Limit1 VCCO drops to 4 V from 5 V 350 mA VCCO Short-Circuit Current1 VCCO < 0.5 V 370 400 mA VIN to VCCO Dropout Voltage2 V I = 100 mA, V ≤ 5 V 0.33 V DROPOUT VCCO IN LOGIC INPUTS EN1, EN2 EN1/EN2 rising 0.57 0.63 0.68 V EN1, EN2 Hysteresis 0.03 V EN1, EN2 Input Leakage Current I V = 2.75 V to 20 V 1 200 nA EN IN SYNC Logic Input Low 1.3 V SYNC Logic Input High 1.9 V SYNC Input Pull-Down Resistance R 1 MΩ SYNC Rev. C | Page 3 of 32 Document Outline Features Applications General Description Typical Operation Circuit Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Architecture Oscillator Frequency Modes of Operation Synchronization Synchronous Rectifier and Dead Time Input Undervoltage Lockout Internal Linear Regulator Overvoltage Protection Power Good Short-Circuit and Current-Limit Protection Shutdown Control Thermal Overload Protection Applications Information Setting the Output Voltage Soft Start Setting the Current Limit Accurate Current-Limit Sensing Setting the Slope Compensation Setting the Current Sense Gain Input Capacitor Selection Input Filter Boost Capacitor Selection Inductor Selection Output Capacitor Selection MOSFET Selection Loop Compensation (Single Phase Operation) Configuration and Loop Compensation (Dual-Phase Operation) Switching Noise and Overshoot Reduction Voltage Tracking Coincident Tracking Ratiometric Tracking Indepdendent Power Stage Input Voltage PCB Layout Guidelines MOSFETs, Input Bulk Capacitor, and Bypass Capacitor High Current and Current Sense Paths Signal Paths PGND Plane Feedback and Current-Limit Sense Paths Switch Node Gate Driver Paths Output Capacitors Typical Operating Circuits Outline Dimensions Ordering Guide