Datasheet LT1374 (Analog Devices) - 6

LT1374
W U TYPICAL PERFOR A CE CHARACTERISTICS BOOST Pin Current VC Pin Shutdown Threshold Inductor Core Loss
100 1.4 1.0 20 DUTY CYCLE = 100% SHUTDOWN VOUT = 5V, VIN = 10V, IOUT = 1A 12 90 8 CORE LOSS (% OF 5W LOAD) 80 1.2 4 TYPE 52 70 POWDERED IRON 0.1 2 60 1.0 1.2 Kool Mµ® 0.8 50 0.4 40 0.8 PERMALLOY CORE LOSS (W) 0.01 0.2 µ = 125 30 CORE LOSS IS 0.12 BOOST PIN CURRENT (mA) THRESHOLD VOLTAGE (V) INDEPENDENT OF LOAD 20 0.08 0.6 CURRENT UNTIL LOAD CURRENT FALLS 10 LOW ENOUGH FOR CIRCUIT TO GO INTO 0.04 DISCONTINUOUS MODE 0 0.4 0.001 0.02 0 1 2 3 4 5 –50 –25 0 25 50 75 100 125 0 5 10 15 20 25 SWITCH CURRENT (A) INDUCTANCE ( JUNCTION TEMPERATURE ( µH) °C) 1374 G16 1374 G11 1374 G01
U U U PI FU CTIO S FB/SENSE:
The feedback pin is the input to the error pins of the 16-lead TSSOP package must be shorted amplifier which is referenced to an internal 2.42V source. together on the PC board. An external resistive divider is used to set the output
GND:
The GND pin connection needs consideration for voltage. The fixed voltage (-5) parts have the divider two reasons. First, it acts as the reference for the regulated included on-chip and the FB pin is used as a SENSE pin, output, so load regulation will suffer if the “ground” end of connected directly to the 5V output. Three additional the load is not at the same voltage as the GND pin of the functions are performed by the FB pin. When the pin IC. This condition will occur when load current or other voltage drops below 1.7V, switch current limit is reduced. currents flow through metal paths between the GND pin Below 1.5V the external sync function is disabled. Below and the load ground point. Keep the ground path short 1V, switching frequency is also reduced. See Feedback Pin between the GND pin and the load and use a ground plane Function section in Applications Information for details. when possible. The second consideration is EMI caused
BOOST:
The BOOST pin is used to provide a drive voltage, by GND pin current spikes. Internal capacitance between higher than the input voltage, to the internal bipolar NPN the VSW pin and the GND pin creates very narrow (<10ns) power switch. Without this added voltage, the typical current spikes in the GND pin. If the GND pin is connected switch voltage loss would be about 1.5V. The additional to system ground with a long metal trace, this trace may boost voltage allows the switch to saturate and voltage radiate excess EMI. Keep the path between the input loss approximates that of a 0.07Ω FET structure. Effi- bypass and the GND pin short. ciency improves from 75% for conventional bipolar de-
V
signs to > 89% for these new parts.
SW:
The switch pin is the emitter of the on-chip power NPN switch. This pin is driven up to the input pin voltage
VIN:
This is the collector of the on-chip power NPN switch. during switch on time. Inductor current drives the switch This pin powers the internal circuitry and internal regulator pin negative during switch off time. Negative voltage is when the BIAS pin is not present. At NPN switch on and off, clamped with the external catch diode. Maximum negative high dI/dt edges occur on this pin. Keep the external switch voltage allowed is – 0.8V. Both VSW pins of the bypass and catch diode close to this pin. All trace induc- 16-lead TSSOP package must be shorted together on the tance on this path will create a voltage spike at switch off, PC board. adding to the VCE voltage across the internal NPN. Both VIN 1374fd 6