LTC1701/LTC1701B UUWUAPPLICATIO S I FOR ATIO Figure 2. The output voltage is set by a resistive divider of 20% to 100% of full-load current having a rise time of according to the following formula: 1µs to 10µs will produce output voltage and ITH pin V waveforms that will give a sense of the overall loop OUT = 1.25V(1 + R2/R1) stability without breaking the feedback loop. To prevent stray pickup, a capacitor of about 5pF can be added across R1, located close to the LTC1701. Unfortu- The initial output voltage step may not be within the nately, the load step response is degraded by this capaci- bandwidth of the feedback loop, so the standard second- tor. Using a good printed circuit board layout eliminates order overshoot/DC ratio cannot be used to determine the need for this capacitor. Great care should be taken to phase margin. The gain of the loop increases with R3 and route the V the bandwidth of the loop increases with decreasing C3. If FB line away from noise sources, such as the inductor or the SW line. R3 is increased by the same factor that C3 is decreased, the zero frequency will be kept the same, thereby keeping VOUT the phase the same in the most critical frequency range of the feedback loop. In addition, a feed-forward capacitor, R2 C LTC1701 F 1% CF, can be added to improve the high frequency response, V as shown in Figure 2. Capacitor C FB F provides phase lead by SGND R1 creating a high frequency zero with R2 which improves the 5pF 1% phase margin. 1701 F02 The output voltage settling behavior is related to the Figure 2. Setting the Output Voltage stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed Transient Response explanation of optimizing the compensation components, including a review of control loop theory, refer to Applica- The OPTI-LOOP compensation allows the transient re- tion Note 76. sponse to be optimized for a wide range of loads and output capacitors. The availability of the ITH pin not only RUN Function allows optimization of the control loop behavior but also provides a DC coupled and AC filtered closed-loop re- The ITH/RUN pin is a dual purpose pin that provides the sponse test point. The DC step, rise time and settling at this loop compensation and a means to shut down the LTC1701. test point truly reflects the closed-loop response. Assum- Soft-start can also be implemented with this pin. Soft-start ing a predominately second order system, phase margin reduces surge currents from VIN by gradually increasing and/or damping factor can be estimated using the percent- the internal peak inductor current. Power supply sequenc- age of overshoot seen at this pin. The bandwidth can also ing can also be accomplished using this pin. be estimated by examining the rise time at the pin. An external pull-up is required to charge the external The I capacitor C3 in Figure 1. Typically, a 1M resistor between TH external components shown in the Figure 1 circuit will provide an adequate starting point for most applica- VIN and ITH/RUN is used. When the voltage on ITH/RUN tions. The series R3-C3 filter sets the dominant pole-zero reaches about 0.8V the LTC1701 begins operating. At this loop compensation. The values can be modified slightly point the error amplifier pulls up the ITH/RUN pin to the (from 0.5 to 2 times their suggested values) to optimize normal operating range of 1.25V to 2.25V. transient response once the final PC layout is done and the Soft-start can be implemented by ramping the voltage on particular output capacitor type and value have been ITH/RUN during start-up as shown in Figure 3(b). As the determined. The output capacitors need to be selected voltage on ITH/RUN ramps through its operating range the because the various types and values determine the loop internal peak current limit is also ramped at a proportional feedback factor gain and phrase. An output current pulse linear rate. 8