Datasheet LT1941 (Analog Devices) - 8

LT1941
BLOCK DIAGRAM
The LT1941 is a constant frequency, current mode, triple Each switcher contains an extra, independent oscillator to output regulator with internal power switches. The three perform frequency foldback during overload conditions. regulators share common circuitry including input source, This slave oscillator is normally synchronized to the master voltage reference and oscillator, but are otherwise inde- oscillator. A comparator senses when VFB is less than 50% pendent. Operation can be best understood by referring of its regulated value and switches the regulator from the to the Block Diagram. master oscillator to a slower slave oscillator. The VFB pin is less than 50% of its regulated value during start-up, short If the RUN/SS pins are tied to ground, the LT1941 is shut circuit and overload conditions. Frequency foldback helps down and draws 50μA from the input source tied to VIN. limit switch current under these conditions. Internal 2μA current sources charge external soft-start capacitors, generating voltage ramps at these pins. If any The switch drivers for SW1 and SW2 operate either of the RUN/SS pins exceed 0.6V, the internal bias circuits from VIN or from the BOOST pin. An external capacitor turn on, including the internal regulator, reference and and diode are used to generate a voltage at the BOOST 1.1MHz master oscillator. Each switching regulator will pin that is higher than the input supply. This allows the only begin to operate when its corresponding RUN/SS pin driver to saturate the internal bipolar NPN power switch reaches ≈1V. The master oscillator generates three clock for effi cient operation. signals, with the two signals for the step-down regulators The BIAS1 pin allows the internal circuitry to draw its out of phase by 180°. current from a lower voltage supply than the input, also The three switchers are current mode regulators. Instead reducing power dissipation and increasing effi ciency. If of directly modulating the duty cycle of the power switch, the voltage on the BIAS1 pin falls below 2.35V, then its the feedback loop controls the peak current in the switch quiescent current will fl ow from VIN. during each cycle. Compared to voltage mode control, cur- The BIAS2 pin allows the driver for SW3 to draw its rent mode control improves loop dynamics and provides current from a lower voltage supply than the input. This cycle-by-cycle current limit. reduces power dissipation within the part and increases The Block Diagram shows only one of the two step-down effi ciency. If the voltage on the BIAS2 pin falls below ≈2V, switching regulators. A pulse from the slave oscillator then SW3 will lock out and will not be able to turn on until sets the RS fl ip-fl op and turns on the internal NPN bipo- BIAS2 rises above ≈2.1V. lar power switch. Current in the switch and the external A power good comparator trips when the FB pin is at inductor begins to increase. When this current exceeds a 91% of its regulated value. The PGOOD output is an level determined by the voltage at VC, current comparator open-collector transistor that is off when the output is in C1 resets the fl ip-fl op, turning off the switch. The current regulation, allowing an external resistor to pull the PGOOD in the inductor fl ows through the external Schottky diode pin high. Power good is valid when the LT1941 is enabled and begins to decrease. The cycle begins again at the next and V pulse from the oscillator. In this way, the voltage on the IN > 3.5V. V Input power good comparators monitor the input supply. C pin controls the current through the inductor to the output. The internal error amplifi er regulates the output The 5GOOD and 12GOOD pins are open-collector outputs voltage by continually adjusting the V of internal comparators. The 5GOOD pin remains low until C pin voltage. The threshold for switching on the V the input is within 10% of 5V. The 12GOOD pin remains C pin is ≈1V and an active clamp of 1.7V limits the output current. The RUN/SS pin low until the input is within 10% of 12V. The 5GOOD and voltage also clamps the V 12GOOD pins are valid as long as V C pin voltage. As the internal IN is greater than current source charges the external soft-start capacitor, 1.1V. Both the 5GOOD and 12GOOD pins will sink current the current limit increases slowly. An internal op amp when the part is in shutdown, independent of the voltage allows the part to regulate negative voltages using only at VIN. two external resistors. 1941fb 8