Datasheet LT1933 (Analog Devices) - 7

HerstellerAnalog Devices
Beschreibung600mA, 500kHz Step-Down Switching Regulator in SOT-23 and DFN Packages
Seiten / Seite20 / 7 — OPERATION (Refer to Block Diagram). APPLICATIONS INFORMATION. FB Resistor …
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DokumentenspracheEnglisch

OPERATION (Refer to Block Diagram). APPLICATIONS INFORMATION. FB Resistor Network. Input Voltage Range

OPERATION (Refer to Block Diagram) APPLICATIONS INFORMATION FB Resistor Network Input Voltage Range

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LT1933
OPERATION (Refer to Block Diagram)
The LT1933 is a constant frequency, current mode step An internal regulator provides power to the control cir- down regulator. A 500kHz oscillator enables an RS fl ip- cuitry. This regulator includes an undervoltage lockout fl op, turning on the internal 750mA power switch Q1. An to prevent switching when VIN is less than ~3.35V. The amplifi er and comparator monitor the current fl owing SHDN pin is used to place the LT1933 in shutdown, dis- between the VIN and SW pins, turning the switch off when connecting the output and reducing the input current to this current reaches a level determined by the voltage at less than 2μA. VC. An error amplifi er measures the output voltage through The switch driver operates from either the input or from an external resistor divider tied to the FB pin and servos the BOOST pin. An external capacitor and diode are used the VC node. If the error amplifi er’s output increases, more to generate a voltage at the BOOST pin that is higher than current is delivered to the output; if it decreases, less cur- the input supply. This allows the driver to fully saturate rent is delivered. An active clamp (not shown) on the VC the internal bipolar NPN power switch for effi cient opera- node provides current limit. The VC node is also clamped tion. to the voltage on the SHDN pin; soft-start is implemented by generating a voltage ramp at the SHDN pin using an The oscillator reduces the LT1933’s operating frequency external resistor and capacitor. when the voltage at the FB pin is low. This frequency foldback helps to control the output current during startup and overload.
APPLICATIONS INFORMATION FB Resistor Network
(~0.4V at maximum load). This leads to a minimum input voltage of: The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the 1% resis- VIN(MIN) = (VOUT + VD)/DCMAX – VD + VSW tors according to: with DCMAX = 0.88 R1 = R2(VOUT/1.245 – 1) The maximum input voltage is determined by the absolute R2 should be 20k or less to avoid bias current errors. maximum ratings of the VIN and BOOST pins and by the Reference designators refer to the Block Diagram. minimum duty cycle DCMIN = 0.08 (corresponding to a minimum on time of 130ns):
Input Voltage Range
VIN(MAX) = (VOUT + VD)/DCMIN – VD + VSW The input voltage range for LT1933 applications depends Note that this is a restriction on the operating input voltage; on the output voltage and on the absolute maximum rat- the circuit will tolerate transient inputs up to the absolute ings of the VIN and BOOST pins. maximum ratings of the VIN and BOOST pins. The minimum input voltage is determined by either the LT1933’s minimum operating voltage of ~3.35V, or by its
Inductor Selection and Maximum Output Current
maximum duty cycle. The duty cycle is the fraction of A good fi rst choice for the inductor value is: time that the internal switch is on and is determined by the input and output voltages: L = 5 (VOUT + VD) DC = (V where V OUT + VD)/(VIN – VSW + VD) D is the voltage drop of the catch diode (~0.4V) and L is in μH. With this value the maximum load current where VD is the forward voltage drop of the catch diode will be above 500mA. The inductor’s RMS current rating (~0.4V) and VSW is the voltage drop of the internal switch must be greater than your maximum load current and its 1933fe 7