Datasheet LTC3548-1 (Analog Devices) - 7

LTC3548-1
OPERATION
The LTC3548-1 uses a constant-frequency, current mode
Low Current Operation
architecture. The operating frequency is set at 2.25MHz. When the load is relatively light, the LTC3548-1 auto- Both channels share the same clock and run in-phase. matically switches into Burst Mode operation, in which The output voltage is set by an internal divider. An error the PMOS switch operates intermittently based on load amplifi er compares the divided output voltage with a demand with a fi xed peak inductor current. By running reference voltage of 0.6V and adjusts the peak inductor cycles periodically, the switching losses which are domi- current accordingly. nated by the gate charge losses of the power MOSFETs are minimized. The main control loop is interrupted when
Main Control Loop
the output voltage reaches the desired regulated value. A During normal operation, the top power switch (P-channel voltage comparator trips when ITH is below 0.35V, shutting MOSFET) is turned on at the beginning of a clock cycle off the switch and reducing the power. The output capaci- when the V tor and the inductor supply the power to the load until I OUT voltage is below the regulated voltage. The TH current fl ows into the inductor and the load increases until exceeds 0.65V, turning on the switch and the main control current limit is reached. The switch turns off and energy loop which starts another cycle. stored in the inductor fl ows through the bottom switch
Dropout Operation
(N-channel MOSFET) into the load until the next clock cycle. When the input supply voltage decreases toward the output voltage, the duty cycle increases to 100% which The peak inductor current is controlled by the internally is the dropout condition. In dropout, the PMOS switch is compensated ITH voltage, which is the output of the error turned on continuously with the output voltage being equal amplifi er. This amplifi er compares the feedback voltage VFB to the input voltage minus the voltage drops across the to the 0.6V reference (see Block Diagram). When the load internal P-channel MOSFET and the inductor. current increases, the VFB voltage decreases slightly below the reference. This decrease causes the error amplifi er to An important design consideration is that the RDS(ON) increase the ITH voltage until the average inductor current of the P-channel switch increases with decreasing input matches the new load current. supply voltage (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation The main control loop is shut down by pulling the RUN when the LTC3548-1 is used at 100% duty cycle with low pin to ground. input voltage (see Thermal Considerations in the Applica- tions Information section).
Low Supply Operation
To prevent unstable operation, the LTC3548-1 incorporates an undervoltage lockout circuit which shuts down the part when the input voltage drops below about 1.65V. 35481fc 7