Datasheet LTC3407-3 (Analog Devices) - 7

LTC3407-3
OPERATION
The LTC3407-3 uses a constant frequency, current mode To optimize effi ciency, the Burst Mode operation can be architecture. The operating frequency is set at 2.25MHz selected. When the load is relatively light, the LTC3407-3 and can be synchronized to an external oscillator. Both automatically switches into Burst Mode operation, in which channels share the same clock and run in-phase. To suit the PMOS switch operates intermittently based on load a variety of applications, the selectable Mode pin allows demand with a fi xed peak inductor current. By running the user to choose between low noise and light load ef- cycles periodically, the switching losses which are domi- fi ciency. nated by the gate charge losses of the power MOSFETs are minimized. The main control loop is interrupted when The output voltage is set by an internal divider. An error the output voltage reaches the desired regulated value. A amplifi er compares the divided output voltage with a voltage comparator trips when ITH is below 0.65V, shutting reference voltage of 0.6V and adjusts the peak inductor off the switch and reducing the power. The output capaci- current accordingly. An undervoltage comparator pulls the tor and the inductor supply the power to the load until ITH POR output low if the output voltage is not above –8.5% exceeds 0.65V, turning on the switch and the main control of the reference voltage. The POR output will go high after loop which starts another cycle. 262,144 clock cycles of achieving regulation. For lower ripple noise at low currents, the pulse-skipping mode can be used. In this mode, the LTC3407-3 continues
Main Control Loop
to switch at a constant frequency down to very low cur- During normal operation, the top power switch (P-channel rents, where it will begin skipping pulses. The effi ciency in MOSFET) is turned on at the beginning of a clock cycle pulse-skipping mode can be improved slightly by connect- when the V ing the SW node to the MODE/SYNC input which reduces OUT voltage is below the the regulated voltage. The current fl ows into the inductor and the load increases the clock frequency by approximately 30%. until the current limit is reached. The switch turns off and energy stored in the inductor fl ows through the bottom
Dropout Operation
switch (N-channel MOSFET) into the load until the next When the input supply voltage decreases toward the clock cycle. output voltage, the duty cycle increases to 100% which The peak inductor current is controlled by the internally is the dropout condition. In dropout, the PMOS switch is compensated I turned on continuously with the output voltage being equal TH voltage, which is the output of the er- ror amplifi er. This amplifi er compares the V to the input voltage minus the voltage drops across the FB (see Block Diagram) to the 0.6V reference. When the load current internal P-channel MOSFET and the inductor. increases, the VFB voltage decreases slightly below the An important design consideration is that the RDS(ON) reference. This decrease causes the error amplifi er to of the P-channel switch increases with decreasing input increase the ITH voltage until the average inductor current supply voltage (See Typical Performance Characteristics). matches the new load current. Therefore, the user should calculate the power dissipation when the LTC3407-3 is used at 100% duty cycle with low The main control loop is shut down by pulling the RUN input voltage (See Thermal Considerations in the Applica- pin to ground. tions Information Section).
Low Current Operation Low Supply Operation
Two modes are available to control the operation of the To prevent unstable operation, the LTC3407-3 incorporates LTC3407-3 at low currents. Both modes automatically an undervoltage lockout circuit which shuts down the part switch from continuous operation to the selected mode when the input voltage drops below about 1.65V. when the load current is low. 34073fb 7