Datasheet LTC3410-1.875 (Analog Devices) - 7

LTC3410-1.875
U OPERATIO (Refer to Functional Diagram) Main Control Loop Short-Circuit Protection
The LTC3410-1.875 uses a constant frequency, current When the output is shorted to ground, the frequency of the mode step-down architecture. Both the main (P-channel oscillator is reduced to about 310kHz, 1/7 the nominal MOSFET) and synchronous (N-channel MOSFET) switches frequency. This frequency foldback ensures that the in- are internal. During normal operation, the internal top ductor current has more time to decay, thereby preventing power MOSFET is turned on each cycle when the oscillator runaway. The oscillator’s frequency will progressively sets the RS latch, and turned off when the current com- increase to 2.25MHz when VOUT rises above 0V. parator, ICOMP, resets the RS latch. The peak inductor current at which I
Slope Compensation and Inductor Peak Current
COMP resets the RS latch, is controlled by the output of error amplifier EA. The VOUT pin, described in Slope compensation provides stability in constant fre- the Pin Functions section, allows EA to receive an output quency architectures by preventing subharmonic oscilla- feedback voltage from the internal resistive divider. When tions at high duty cycles. It is accomplished internally by the load current increases, it causes a slight decrease in adding a compensating ramp to the inductor current the feedback voltage relative to the 0.8V reference, which signal at duty cycles in excess of 40%. Normally, this in turn, causes the EA amplifier’s output voltage to in- results in a reduction of maximum inductor peak current crease until the average inductor current matches the new for duty cycles > 40%. However, the LTC3410-1.875 uses load current. While the top MOSFET is off, the bottom a patented scheme that counteracts this compensating MOSFET is turned on until either the inductor current ramp, which allows the maximum inductor peak current starts to reverse, as indicated by the current reversal to remain unaffected throughout all duty cycles. comparator IRCMP, or the beginning of the next clock cycle.
Burst Mode Operation
The LTC3410-1.875 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 70mA re- gardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 26µA. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier’s output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand. 34101875f 7