Datasheet LTC3549 (Analog Devices) - 8

HerstellerAnalog Devices
Beschreibung250mA Low VIN Buck Regulator in 2mm × 3mm DFN
Seiten / Seite16 / 8 — OPERATIO. Main Control Loop. Short-Circuit Protection. Dropout Operation. …
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DokumentenspracheEnglisch

OPERATIO. Main Control Loop. Short-Circuit Protection. Dropout Operation. Burst Mode Operation. Slope Compensation

OPERATIO Main Control Loop Short-Circuit Protection Dropout Operation Burst Mode Operation Slope Compensation

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LTC3549
U OPERATIO Main Control Loop
state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA The LTC3549 uses a constant-frequency, current mode amplifi er’s output rises above the sleep threshold signaling step-down architecture. Both the main (P-channel the BURST comparator to trip and turn the top MOSFET MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top on. This process repeats at a rate that is dependent on power MOSFET is turned on each cycle when the oscil- the load demand. lator sets the RS latch, and turned off when the current
Short-Circuit Protection
comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch is controlled by When the output is shorted to ground the LTC3549 limits the the output of error amplifi er EA. The VFB pin, described in synchronous switch current to 0.45A. If this limit is exceeded, the Pin Functions section, allows EA to receive an output the top power MOSFET is inhibited from turning on until feedback voltage from an external resistive divider. When the current in the synchronous switch falls below 0.45A. the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.611V reference,
Dropout Operation
which in turn, causes the EA amplifi er’s output voltage to As the input supply voltage decreases to a value approach- increase until the average inductor current matches the ing the output voltage, the duty cycle increases toward the new load current. While the top MOSFET is off, the bottom maximum on-time. Further reduction of the supply voltage MOSFET is turned on until either the inductor current starts forces the main switch to remain on for more than one cycle to reverse, as indicated by the current reversal comparator until it reaches 100% duty cycle. The output voltage will IRCMP, or the beginning of the next clock cycle. then be determined by the input voltage minus the voltage Comparator OVDET guards against transient overshoots drop across the P-channel MOSFET and the inductor. >10% by turning the main switch off and keeping it off Another important detail to remember is that at low input until the transient has ended. supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics).
Burst Mode Operation
Therefore, the user should calculate the power dissipation The LTC3549 is capable of Burst Mode operation in which when the LTC3549 is used at 100% duty cycle with low the internal power MOSFETs operate intermittently based input voltage (see Thermal Considerations in the Applica- on load demand. To enable Burst Mode operation, simply tions Information section). connect the MODE pin to GND. To disable Burst Mode operation and enable PWM pulse-skipping mode, connect
Slope Compensation
the MODE pin to VIN or drive it with a logic high (VMODE > Slope compensation provides stability in constant-fre- 1.1V). In this mode, the effi ciency is lower at light loads, quency architectures by preventing subharmonic oscil- but becomes comparable to Burst Mode operation when lations at high duty cycles. It is accomplished internally the output load exceeds 50mA. The advantage of pulse- by adding a compensating ramp to the inductor current skipping mode is lower output ripple and less interference signal at duty cycles in excess of 40%. to audio circuitry. When the converter is in Burst Mode operation, the minimum peak current of the inductor is
Internal Soft-Start
set to approximately 100mA regardless of the output load. Each burst event can last from a few cycles at light loads At start-up when the RUN pin is brought high, the internal to almost continuously cycling with short sleep intervals reference is linearly ramped from 0V to 0.611V in 1ms. The at moderate loads. In between these burst events, the regulated feedback voltage will follow this ramp, resulting power MOSFETs and any unneeded circuitry are turned in the output voltage ramping from 0% to 100% in 1ms. off, reducing the quiescent current to 50µA. In this sleep The average current in the inductor during soft-start will 3549f 8