Datasheet LTC3541-2 (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | High Efficiency Buck + VLDO Regulator |
| Seiten / Seite | 22 / 8 — PIN FUNCTIONS. VIN (Pin 1):. SW (Pin 10):. ENBUCK (Pin 2):. Exposed Pad … |
| Dateiformat / Größe | PDF / 557 Kb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS. VIN (Pin 1):. SW (Pin 10):. ENBUCK (Pin 2):. Exposed Pad (Pin 11):. OUT (Pin 3):. NC (Pin 4):. Note:. LVOUT (Pin 5):
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LTC3541-2
PIN FUNCTIONS VIN (Pin 1):
Main Supply Pin. This pin must be closely
SW (Pin 10):
Switch Node Pin. This pin connects the decoupled to GND with a 10µF or greater capacitor. internal main and synchronous power MOSFET switches
ENBUCK (Pin 2):
Buck Enable Pin. This pin enables the to the external inductor for the buck regulator. buck regulator when driven to a logic high.
Exposed Pad (Pin 11):
Ground Pin. This pin must be
V
soldered to the PCB to provide both electrical contact to
OUT (Pin 3):
Buck Regulator Output Pin. This pin receives the buck regulator’s output voltage. ground and good thermal contact to the PCB.
NC (Pin 4):
Not Connected. This pin must not be connected
Note:
Table 1 details the truth table for the control pins or capacitively loaded. of the LTC3541-2.
LVOUT (Pin 5):
VLDO/Linear Regulator Output Pin. This
Table 1. LTC3541-2 Control Pin Truth Table
pin provides the regulated output voltage from the VLDO
PIN NAME
or linear regulator.
ENBUCK ENVLDO MODE OPERATIONAL DESCRIPTION LV
0 0 X LTC3541-2 Powered Down
IN (Pin 6):
VLDO/Linear Regulator Input Supply Pin. This pin provides the input supply voltage for the VLDO 0 1 X Buck Powered Down, VLDO Powered Down, Linear Regulator Enabled power FET. 1 0 0 Buck Enabled, VLDO Powered Down,
GND (Pin 7):
Analog Ground Pin. Linear Regulator Powered Down, Burst Mode Operation
MODE (Pin 8):
Buck Mode Selection Pin. This pin enables 1 0 1 Buck Enabled, VLDO Powered Down, buck Pulse-Skip operation when driven to a logic high Linear Regulator Powered Down, Pulse-Skip Mode Operation and enables buck Burst Mode operation when driven to 1 1 0 Buck Enabled, VLDO Enabled, Linear a logic low. Regulator Powered Down, Burst Mode Operation
ENVLDO (Pin 9):
VLDO/Linear Regulator Enable Pin. 1 1 1 Buck Enabled, VLDO Enabled, Linear When driven to a logic high, this pin enables the linear Regulator Powered Down, Pulse-Skip regulator when the ENBUCK pin is driven to a logic low, Mode Operation and enables the VLDO regulator when the ENBUCK pin is driven to a logic high. 35412fc 8 For more information www.linear.com/LTC3541-2 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Operation Applications Information Package Description Revision History Related Parts
PIN FUNCTIONS VIN (Pin 1):
Main Supply Pin. This pin must be closely
SW (Pin 10):
Switch Node Pin. This pin connects the decoupled to GND with a 10µF or greater capacitor. internal main and synchronous power MOSFET switches
ENBUCK (Pin 2):
Buck Enable Pin. This pin enables the to the external inductor for the buck regulator. buck regulator when driven to a logic high.
Exposed Pad (Pin 11):
Ground Pin. This pin must be
V
soldered to the PCB to provide both electrical contact to
OUT (Pin 3):
Buck Regulator Output Pin. This pin receives the buck regulator’s output voltage. ground and good thermal contact to the PCB.
NC (Pin 4):
Not Connected. This pin must not be connected
Note:
Table 1 details the truth table for the control pins or capacitively loaded. of the LTC3541-2.
LVOUT (Pin 5):
VLDO/Linear Regulator Output Pin. This
Table 1. LTC3541-2 Control Pin Truth Table
pin provides the regulated output voltage from the VLDO
PIN NAME
or linear regulator.
ENBUCK ENVLDO MODE OPERATIONAL DESCRIPTION LV
0 0 X LTC3541-2 Powered Down
IN (Pin 6):
VLDO/Linear Regulator Input Supply Pin. This pin provides the input supply voltage for the VLDO 0 1 X Buck Powered Down, VLDO Powered Down, Linear Regulator Enabled power FET. 1 0 0 Buck Enabled, VLDO Powered Down,
GND (Pin 7):
Analog Ground Pin. Linear Regulator Powered Down, Burst Mode Operation
MODE (Pin 8):
Buck Mode Selection Pin. This pin enables 1 0 1 Buck Enabled, VLDO Powered Down, buck Pulse-Skip operation when driven to a logic high Linear Regulator Powered Down, Pulse-Skip Mode Operation and enables buck Burst Mode operation when driven to 1 1 0 Buck Enabled, VLDO Enabled, Linear a logic low. Regulator Powered Down, Burst Mode Operation
ENVLDO (Pin 9):
VLDO/Linear Regulator Enable Pin. 1 1 1 Buck Enabled, VLDO Enabled, Linear When driven to a logic high, this pin enables the linear Regulator Powered Down, Pulse-Skip regulator when the ENBUCK pin is driven to a logic low, Mode Operation and enables the VLDO regulator when the ENBUCK pin is driven to a logic high. 35412fc 8 For more information www.linear.com/LTC3541-2 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Operation Applications Information Package Description Revision History Related Parts