Datasheet LTC3406A (Analog Devices) - 7

LTC3406A
OPERATION (Refer to Functional Diagram) Main Control Loop
off, reducing the quiescent current to 20μA. In this sleep state, the load current is being supplied solely from the The LTC3406A uses a constant frequency, current mode output capacitor. As the output voltage droops, the EA step-down architecture. Both the main (P-channel amplifi er’s output rises above the sleep threshold signaling MOSFET) and synchronous (N-channel MOSFET) switches the BURST comparator to trip and turn the top MOSFET are internal. During normal operation, the internal top power on. This process repeats at a rate that is dependent on MOSFET is turned on each cycle when the oscillator sets the load demand. the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at
Dropout Operation
which ICOMP resets the RS latch, is controlled by the output of error amplifi er EA. When the load current increases, As the input supply voltage decreases to a value approach- it causes a slight decrease in the feedback voltage, FB, ing the output voltage, the duty cycle increases toward the relative to the 0.6V reference, which in turn, causes the maximum on-time. Further reduction of the supply voltage EA amplifi er’s output voltage to increase until the average forces the main switch to remain on for more than one cycle inductor current matches the new load current. While the until it reaches 100% duty cycle. The output voltage will top MOSFET is off, the bottom MOSFET is turned on until then be determined by the input voltage minus the voltage either the inductor current starts to reverse, as indicated drop across the P-channel MOSFET and the inductor. by the current reversal comparator IRCMP, or the beginning An important detail to remember is that at low input supply of the next clock cycle. voltages, the RDS(ON) of the P-channel switch increases The main control loop is shut down by grounding RUN, (see Typical Performance Characteristics). Therefore, resetting the internal soft-start. Re-enabling the main the user should calculate the power dissipation when control loop by pulling RUN high activates the internal the LTC3406A is used at 100% duty cycle with low input soft-start, which slowly ramps the output voltage over voltage (See Thermal Considerations in the Applications approximately 0.9ms until it reaches regulation. Information section).
Burst Mode Operation Slope Compensation and Inductor Peak Current
The LTC3406A is capable of Burst Mode operation in which Slope compensation provides stability in constant fre- the internal power MOSFETs operate intermittently based quency architectures by preventing subharmonic oscilla- on load demand. tions at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal In Burst Mode operation, the peak current of the inductor at duty cycles in excess of 40%. Normally, this results in is set to approximately 100mA regardless of the output a reduction of maximum inductor peak current for duty load. Each burst event can last from a few cycles at light cycles > 40%. However, the LTC3406A uses a patented loads to almost continuously cycling with short sleep scheme that counteracts this compensating ramp, which intervals at moderate loads. In between these burst events, allows the maximum inductor peak current to remain the power MOSFETs and any unneeded circuitry are turned unaffected throughout all duty cycles. 3406afa 7