Datasheet LT3680 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | 36V, 3.5A, 2.4MHz Step-Down Switching Regulator with 75µA Quiescent Current |
| Seiten / Seite | 24 / 7 — PIN FUNCTIONS. BD (Pin 1):. SYNC (Pin 6):. BOOST (Pin 2):. SW (Pin 3):. … |
| Revision | C |
| Dateiformat / Größe | PDF / 526 Kb |
| Dokumentensprache | Englisch |
PIN FUNCTIONS. BD (Pin 1):. SYNC (Pin 6):. BOOST (Pin 2):. SW (Pin 3):. PG (Pin 7):. VIN (Pin 4):. FB (Pin 8):. RUN/SS (Pin 5):
Modelllinie für dieses Datenblatt
Textversion des Dokuments
link to page 9 link to page 15 LT3680
PIN FUNCTIONS BD (Pin 1):
This pin connects to the anode of the boost
SYNC (Pin 6):
This is the external clock synchronization Schottky diode. BD also supplies current to the internal input. Ground this pin for low ripple Burst Mode operation regulator. at low output loads. Tie to a clock source for synchroniza-
BOOST (Pin 2):
This pin is used to provide a drive tion. Clock edges should have rise and fall times faster voltage, higher than the input voltage, to the internal bipo- than 1µs. Do not leave pin floating. See Synchronization lar NPN power switch. section in Applications Information.
SW (Pin 3):
The SW pin is the output of the internal power
PG (Pin 7):
The PG pin is the open collector output of switch. Connect this pin to the inductor, catch diode and an internal comparator. PG remains low until the FB pin boost capacitor. is within 9% of the final regulation voltage. PG output is valid when VIN is above 3.6V and RUN/SS is high.
VIN (Pin 4):
The VIN pin supplies current to the LT3680’s internal regulator and to the internal power switch. This
FB (Pin 8):
The LT3680 regulates the FB pin to 0.790V. pin must be locally bypassed. Connect the feedback resistor divider tap to this pin.
RUN/SS (Pin 5):
The RUN/SS pin is used to put the
VC (Pin 9):
The VC pin is the output of the internal error LT3680 in shutdown mode. Tie to ground to shut down amplifier. The voltage on this pin controls the peak switch the LT3680. Tie to 2.5V or more for normal operation. If current. Tie an RC network from this pin to ground to the shutdown feature is not used, tie this pin to the V compensate the control loop. IN pin. RUN/SS also provides a soft-start function; see the
RT (Pin 10):
Oscil ator Resistor Input. Connecting a resis- Applications Information section. tor to ground from this pin sets the switching frequency.
Exposed Pad (Pin 11):
Ground. The Exposed Pad must be soldered to PCB.
BLOCK DIAGRAM
VIN VIN 4 C1 – INTERNAL 0.79V REF + BD 1 RUN/SS 5 Σ SLOPE COMP SWITCH BOOST LATCH 2 R C3 RT OSCILLATOR Q 10 200kHzTO2.4MHz S RT SW L1 V 3 OUT SYNC DISABLE 6 C2 D1 BurstMode SOFT-START DETECT PG 7 ERROR AMP VC CLAMP + 0.725V + VC 9 – – CC CF GND FB RC 11 8 R2 R1 3680 BD Rev C For more information www.analog.com 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS BD (Pin 1):
This pin connects to the anode of the boost
SYNC (Pin 6):
This is the external clock synchronization Schottky diode. BD also supplies current to the internal input. Ground this pin for low ripple Burst Mode operation regulator. at low output loads. Tie to a clock source for synchroniza-
BOOST (Pin 2):
This pin is used to provide a drive tion. Clock edges should have rise and fall times faster voltage, higher than the input voltage, to the internal bipo- than 1µs. Do not leave pin floating. See Synchronization lar NPN power switch. section in Applications Information.
SW (Pin 3):
The SW pin is the output of the internal power
PG (Pin 7):
The PG pin is the open collector output of switch. Connect this pin to the inductor, catch diode and an internal comparator. PG remains low until the FB pin boost capacitor. is within 9% of the final regulation voltage. PG output is valid when VIN is above 3.6V and RUN/SS is high.
VIN (Pin 4):
The VIN pin supplies current to the LT3680’s internal regulator and to the internal power switch. This
FB (Pin 8):
The LT3680 regulates the FB pin to 0.790V. pin must be locally bypassed. Connect the feedback resistor divider tap to this pin.
RUN/SS (Pin 5):
The RUN/SS pin is used to put the
VC (Pin 9):
The VC pin is the output of the internal error LT3680 in shutdown mode. Tie to ground to shut down amplifier. The voltage on this pin controls the peak switch the LT3680. Tie to 2.5V or more for normal operation. If current. Tie an RC network from this pin to ground to the shutdown feature is not used, tie this pin to the V compensate the control loop. IN pin. RUN/SS also provides a soft-start function; see the
RT (Pin 10):
Oscil ator Resistor Input. Connecting a resis- Applications Information section. tor to ground from this pin sets the switching frequency.
Exposed Pad (Pin 11):
Ground. The Exposed Pad must be soldered to PCB.
BLOCK DIAGRAM
VIN VIN 4 C1 – INTERNAL 0.79V REF + BD 1 RUN/SS 5 Σ SLOPE COMP SWITCH BOOST LATCH 2 R C3 RT OSCILLATOR Q 10 200kHzTO2.4MHz S RT SW L1 V 3 OUT SYNC DISABLE 6 C2 D1 BurstMode SOFT-START DETECT PG 7 ERROR AMP VC CLAMP + 0.725V + VC 9 – – CC CF GND FB RC 11 8 R2 R1 3680 BD Rev C For more information www.analog.com 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts