Datasheet LTC3603 (Analog Devices) - 8

HerstellerAnalog Devices
Beschreibung2.5A, 15V Monolithic Synchronous Step-Down Regulator
Seiten / Seite22 / 8 — operation Main Control Loop. Burst Mode Operation. Forced Continuous …
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DokumentenspracheEnglisch

operation Main Control Loop. Burst Mode Operation. Forced Continuous Mode. Frequency Synchronization

operation Main Control Loop Burst Mode Operation Forced Continuous Mode Frequency Synchronization

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LTC3603
operation Main Control Loop
some applications where it is necessary to keep switching The LTC3603 is a monolithic, constant-frequency, current harmonics out of a signal band. The output voltage ripple mode step-down DC/DC converter. During normal is minimized in this mode. operation, the internal top power switch (N-channel
Burst Mode Operation
MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current Connecting the SYNC/MODE pin to a voltage in the range comparator trips and turns off the top power MOSFET. The of 0.42V to 1V enables Burst Mode operation. In Burst peak inductor current at which the current comparator shuts Mode operation, the internal power MOSFETs operate off the top power switch is controlled by the voltage on the intermittently at light loads. This increases efficiency by ITH pin. The error amplifier adjusts the voltage on the ITH minimizing switching losses. During Burst Mode opera- pin by comparing the feedback signal from a resistor divider tion, the minimum peak inductor current is externally set on the V by the voltage on the SYNC/MODE pin and the voltage FB pin with an internal 0.6V reference. When the load current increases, it causes a reduction in the feedback on the ITH pin is monitored by the burst comparator to voltage relative to the reference. The error amplifier raises determine when sleep mode is enabled and disabled. the ITH voltage until the average inductor current matches When the average inductor current is greater than the the new load current. When the top power MOSFET shuts load current, the voltage on the ITH pin drops. As the ITH off, the synchronous power switch (N-channel MOSFET) voltage falls below 330mV, the burst comparator trips and turns on until either the bottom current limit is reached or enables sleep mode. During sleep mode, the top power the beginning of the next clock cycle. The bottom current MOSFET is held off and the ITH pin is disconnected from limit is set at –2.5A for forced continuous mode and 0A the output of the error amplifier. The majority of the internal for Burst Mode operation. circuitry is also turned off to reduce the quiescent current to 75µA while the load current is solely supplied by the The operating frequency is externally set by an external output capacitor. When the output voltage drops, the ITH resistor connected between the RT pin and ground. The pin is reconnected to the output of the error amplifier and practical switching frequency can range from 300kHz to the top power MOSFET along with all the internal circuitry 3MHz. is switched back on. This process repeats at a rate that During start-up, with the feedback voltage less than 10% is dependent on the load demand. Pulse-skipping opera- its normal value, the part will operate in pulse-skipping tion is implemented by connecting the SYNC/MODE pin mode. Once the feedback voltage is within the 10% range, to ground. This forces the burst clamp level to be at 0V. the part operation will switch to the mode selected. As the load current decreases, the peak inductor current Overvoltage and undervoltage comparators will pull the will be determined by the voltage on the ITH pin until the PGOOD output low if the output voltage comes out of ITH voltage drops below 330mV. At this point, the peak regulation by ±10%. In an overvoltage condition, the top inductor current is determined by the minimum on-time power MOSFET is turned off and the bottom power MOSFET of the current comparator. If the load demand is less than is switched on until either the overvoltage condition clears the average of the minimum on-time inductor current, or the bottom MOSFET’s current limit is reached. switching cycles will be skipped to keep the output volt- age in regulation.
Forced Continuous Mode Frequency Synchronization
Connecting the SYNC/MODE pin to INTVCC will disable Burst Mode operation and forced continuous current operation. The internal oscillator of the LTC3603 can be synchronized At light loads, forced continuous mode operation is less to an external 5V clock connected to the SYNC/MODE pin. efficient than Burst Mode operation, but may be desirable in The frequency of the external clock can be in the range of 300kHz to 3MHz. For this application, the oscillator timing 3603fc 8 For more information www.linear.com/LTC3603