Datasheet ADP5020 (Analog Devices) - 6

HerstellerAnalog Devices
BeschreibungPower Management Unit for Imaging Modules
Seiten / Seite28 / 6 — ADP5020. DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR. Table 4. …
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ADP5020. DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR. Table 4. Parameter Symbol. Conditions. Min. Typ. Max. Unit

ADP5020 DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR Table 4 Parameter Symbol Conditions Min Typ Max Unit

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ADP5020 DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR Table 4. Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE Adjustable Range1 VOUT2 4-bit range 1.1 1.8 V Initial Accuracy TA = 25°C, VDD2 = 3.6 V, VOUT2 = 1.2 V, ILOAD = 20 mA −1 +1 % Total Accuracy VDD2 = 2.5 V to 5 V, ILOAD = 10 mA to 250 mA −5 +4 % Load Regulation ILOAD = 10 mA to 250 mA 0.2 % Line Regulation VDDA = 1.8 V, VDD2 = 2.5 V to 5 V 0.15 % CURRENT Maximum Output Current IBK2MAX 250 mA Quiescent Current IQBK2 ILOAD = 0 mA 4 6.5 mA POWER Low-Side Power nMOSFET RDSON2 ID = 200 mA 240 330 mΩ High-Side Power pMOSFET RDSON2 ID = 200 mA 300 450 mΩ SWITCH CURRENT LIMIT ICL2 360 630 850 mA MINIMUM ON TIME tMIN2 55 ns MAXIMUM DUTY CYCLE DMAX2 87.5 90 % SOFT START TIME tSS2 900 μs COUT DISCHARGE SWITCH ON RESISTANCE RDIS2 0.7 1 1.3 kΩ 1 See Tabl (t e 14 he BUCK2_LDO_VSEL register, Address 0x02) for details.
VOUT3 SPECIFICATIONS, LOW DROPOUT (LDO) REGULATOR Table 5. Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE Adjustable Range1 VOUT3 100 mV step, 4-bit range 1.8 3.3 V Initial Accuracy TA = 25°C, VDD3 = 3.6 V, VOUT3 = 1.8 V, ILOAD = 10 mA −1.5 +1.5 % Total Accuracy VDD3 = 2.5 V to 5 V, ILOAD = 0 mA to 150 mA −5 +4 % Load Regulation ILOAD = 10 mA to 100 mA 0.45 0.75 % Line Regulation ILOAD = 100 mA2 0.15 0.30 % CURRENT Maximum Output Current ILDOMAX 150 mA Dropout Voltage VLDODROP At 100 mA, VOUT3 = 3.3 V 70 100 mV Quiescent Current IQ ILOAD = 0 mA 45 85 μA Short-Circuit Current Limit 200 400 600 mA Power Supply Rejection Ratio PSRR f = 1 kHz, VDD3 = 5 V, VOUT3 = 3.3 V, ILOAD = 50 mA 47 dB f = 10 kHz, VDD3 = 5 V, VOUT3 = 3.3 V, ILOAD = 50 mA 44 dB SOFT START TIME tSS2 70 μs COUT DISCHARGE SWITCH ON RESISTANCE RDIS8 0.7 1 1.3 kΩ 1 See Tabl (t e 14 he BUCK_LDO_VSEL register, Address 0x02) for details. 2 VDD3 > VOUT3 + LDODROP. Rev. 0 | Page 6 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS SWITCHING SPECIFICATIONS DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 1 REGULATOR DC-TO-DC CONVERSION SPECIFICATIONS, BUCK 2 REGULATOR VOUT3 SPECIFICATIONS, LOW DROPOUT (LDO) REGULATOR I2C TIMING SPECIFICATIONS Timing Diagram ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Thermal Data ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT OPERATION INTERNAL COMPENSATION CURRENT LIMITING AND SHORT-CIRCUIT PROTECTION SYNCHRONIZATION I2C INTERFACE UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN CONTROL REGISTERS DEVICE ADDRESS REGISTER MAP REGISTER DESCRIPTIONS User Accessible Registers POWER-UP/POWER-DOWN SEQUENCE SEQUENCER DEFAULT POWER-ON SEQUENCE WITH EN PIN Activation Waveforms POWER-ON SEQUENCE USING THE I2C INTERFACE POWER-UP/POWER-DOWN STATE FLOW APPLICATIONS INFORMATION POWER GOOD STATUS XSHTDN LOGIC COMPONENTS SELECTION Buck Inductor Input Capacitor Selection Output Capacitor Selection LDO INPUT FILTER LAYOUT RECOMMENDATIONS APPLICATIONS SCHEMATIC PCB BOARD LAYOUT RECOMMENDATIONS EXTERNAL COMPONENT LIST OUTLINE DIMENSIONS ORDERING GUIDE