Datasheet LTC3601 (Analog Devices) - 7

HerstellerAnalog Devices
Beschreibung1.5A, 15V Monolithic Synchronous Step-Down Regulator
Seiten / Seite26 / 7 — PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15):. RT (Pin 10/Pin 8):. FB …
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DokumentenspracheEnglisch

PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15):. RT (Pin 10/Pin 8):. FB (Pin 11/Pin 9):. PGOOD (Pin 2/Pin 16):

PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15): RT (Pin 10/Pin 8): FB (Pin 11/Pin 9): PGOOD (Pin 2/Pin 16):

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LTC3601
PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15):
Mode Selection and External
RT (Pin 10/Pin 8):
Oscillator Frequency Program Pin. Synchronization Input Pin. This pin places the LTC3601 Connect an external resistor, between 80k to 400k, from into forced continuous operation when tied to ground. this pin to SGND to program the LTC3601 switching fre- High efficiency Burst Mode operation is enabled by either quency from 800kHz to 4MHz. When RT is tied to INTVCC, floating this pin or by tying this pin to INTVCC. When driven the switching frequency will default to 2MHz. with an external clock, an internal phase-locked loop will
FB (Pin 11/Pin 9):
Output Voltage Feedback Pin. Input to synchronize the phase and frequency of the internal oscil- the error amplifier that compares the feedback voltage to lator to that of the incoming clock signal. During external the internal 0.6V reference voltage. Connect this pin to clock synchronization, the LTC3601 will default to forced the appropriate resistor divider network to program the continuous operation. desired output voltage.
PGOOD (Pin 2/Pin 16):
Open-Drain Power Good Output
ITH (Pin 12/Pin 10):
Error Amplifier Output and Switching Pin. PGOOD is pulled to ground when the voltage at the Regulator Compensation Pin. Connect this pin to appro- FB pin is not within 8% (typical) of the internal 0.6V refer- priate external components to compensate the regulator ence. PGOOD becomes high impedance once the voltage loop frequency response. Connect this pin to INTV at the FB pin returns to within ±5% (typical) of the internal CC to use the default internal compensation. reference.
TRACK (Pin 13/Pin 11):
Output Voltage Tracking and Soft-
SW (Pins 3, 4/Pins 1, 2):
Switch Node Output Pin. Con- Start Input Pin. Forcing a voltage below 0.6V on this pin nect this pin to the SW side of the external inductor. The overrides the internal reference input to the error amplifier. normal operation voltage swing of this pin ranges from The LTC3601 will servo the FB pin to the TRACK voltage ground to PVIN. under this condition. Above 0.6V, the tracking function
BOOST (Pin 6/Pin 5):
Boosted Floating Driver Supply stops and the internal reference resumes control of the Pin. The (+) terminal of the external bootstrap capacitor error amplifier. An internal 1.4µA pull-up current from connects to this pin while the (–) terminal connects to INTVCC allows a soft-start function to be implemented the SW pin. The normal operation voltage swing of this by connecting an external capacitor between this pin and pin ranges from a diode voltage drop below INTVCC up ground. See Applications Information section for more to PVIN + INTVCC. details.
INTVCC (Pin 7/Pin 6):
Internal 3.3V Regulator Output Pin.
RUN (Pin 14/Pin 12):
Regulator Enable Pin. Enables chip This pin should be decoupled to PGND with a low ESR operation by applying a voltage above 1.25V. A voltage ceramic capacitor of 1µF or more. below 1V on this pin places the part into shutdown. Do
V
not float this pin.
ON (Pin 8/Pin 7):
On-Time Voltage Input Pin. This pin sets the voltage trip point for the on-time comparator.
VIN (Pins 15, 16/Pins 13, 14):
Main Power Supply Input Connect this pin to the regulated output to make the on- Pins. These pins should be closely decoupled to PGND time proportional to the output voltage when VOUT ≤ 6V. If with a low ESR capacitor of 10µF or more. VOUT > 6V, switching frequency may become higher than
PGND (Exposed Pad Pin 17/Pins 3, 4):
Power Ground Pin. the set frequency. The pin impedance is normally 180kΩ. The (–) terminal of the input bypass capacitor, CIN, and the
SGND (Pin 9/Exposed Pad Pin 17):
Signal Ground Pin. (–) terminal of the output capacitor, COUT , should be tied This pin should have a low noise connection to reference to this pin with a low impedance connection. In the QFN ground. The feedback resistor network, external compen- package the exposed pad must be soldered to the PCB to sation network and RT resistor should be connected to provide low impedance electrical contact to ground and this ground. In the MSE package, the exposed pad must good thermal contact to the PCB. be soldered to the PCB to provide a good thermal contact to the PCB. 3601fc For more information www.linear.com/LTC3601 7 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Related Parts