Datasheet ADP5033 (Analog Devices) - 7

Data Sheet ADP5033 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 1 2 3 4 VOUT3 VIN3 VIN4 VOUT4 A AGND MODE ENA ENB B VIN1 VOUT1 VOUT2 VIN2 C PGND1 SW1 SW2 PGND2 D TOP VIEW
02
(BALL SIDE DOWN)
0 8-
Not to Scale
978 0 Figure 2. Pin Configuration—View from the Top of the Die
Table 8. Pin Function Descriptions Pin No. Mnemonic Description
A1 VOUT3 LDO1 Output Voltage and Sensing Input. A2 VIN3 LDO1 Input Supply (1.7 V to 5.5 V, VIN4 ≤ VIN1 = VIN2). A3 VIN4 LDO2 Input Supply (1.7 V to 5.5 V, VIN3 ≤ VIN1 = VIN2). A3 VOUT4 LDO2 Output Voltage and Sensing Input. B1 AGND Analog Ground. B2 MODE BUCK1/BUCK2 Operating Mode. MODE = high: forced PWM operation. MODE = low: auto PWM/PSM operation. B3 ENA Regulator Enable Pin A, Active High. The regulators turned on with ENA are factory programmed. B4 ENB Regulator Enable Pin B, Active High. The regulators turned on with ENB are factory programmed. C1 VIN1 BUCK1 Input Supply (2.3 V to 5.5 V) and UVLO Detection. Connect VIN1 to VIN2. C2 VOUT1 BUCK1 Output Voltage Sensing Input. C3 VOUT2 BUCK2 Output Voltage Sensing Input. C4 VIN2 BUCK2 Input Supply (2.3 V to 5.5 V). Connect VIN2 to VIN1. D1 PGND1 Dedicated Power Ground for BUCK1. D2 SW1 BUCK1 Switching Node. D3 SW2 BUCK2 Switching Node. D4 PGND2 Dedicated Power Ground for BUCK2. Rev. G | Page 7 of 28 Document Outline Features Applications Typical Application Circuit General Description Table of Contents Revision History Specifications General Specifications BUCK1 and BUCK2 Specifications LDO1 and LDO2 Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Management Unit Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK1 and BUCK2 Control Scheme PWM Mode PSM PSM Current Threshold Oscillator/Phasing of Inductor Switching Short-Circuit Protection Soft Start Current Limit 100% Duty Operation Active Pull-Downs LDO1 and LDO2 Applications Information Buck External Component Selection Inductor Output Capacitor Input Capacitor LDO Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Power Dissipation and Thermal Considerations Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature PCB Layout Guidelines Typical Application Schematic Outline Dimensions Ordering Guide