Datasheet LTC3600 (Analog Devices) - 10

LTC3600
operaTion Main Control Loop
Pulling the RUN pin to ground forces the LTC3600 into The LTC3600 is a current mode monolithic step down its shutdown state, turning off both power MOSFETs and regulator. The accurate 50µA current source on the ISET pin all of its internal control circuitry. Bringing the RUN pin allows the user to use just one external resistor to program above 0.7V turns on the internal reference only, while still the output voltage in a unity gain buffer fashion. In normal keeping the power MOSFETs off. Further increasing the operation, the internal top power MOSFET is turned on for RUN voltage above 1.5V turns on the entire chip. a fixed interval determined by a fixed one-shot timer OST.
INTV
When the top power MOSFET turns off, the bottom power
CC Regulator
MOSFET turns on until the current comparator ICMP trips, An internal low drop out (LDO) regulator produces the restarting the one-shot timer and initiating the next cycle. 5V supply that powers the drivers and the internal bias Inductor current is determined by sensing the voltage circuitry. The INTVCC can supply up to 50mA RMS and drop across the SW and PGND nodes of the bottom power must be bypassed to ground with a minimum of 1µF ce- MOSFET. The voltage on the ITH pin sets the comparator ramic capacitor. Good bypassing is necessary to supply threshold corresponding to inductor valley current. The the high transient currents required by the power MOSFET error amplifier, EA, adjusts this ITH voltage by comparing gate drivers. Applications with high input voltage and high the V switching frequency will increase die temperature because OUT voltage with the voltage on ISET. If the load current increases, it causes a drop in the V of the higher power dissipation across the LDO. Connect- OUT voltage relative to V ing a load to the INTV ISET. The ITH voltage then rises until the average inductor CC pin is not recommended since current matches that of the load current. it will further push the LDO into its RMS current rating while increasing power dissipation and die temperature. At low load current, the inductor current can drop to zero and become negative. This is detected by current rever-
VIN Overvoltage Protection
sal comparator, IREV , which then shuts off the bottom power MOSFET, resulting in discontinuous operation. In order to protect the internal power MOSFET devices Both power MOSFETs will remain off with the output against transient voltage spikes, the LTC3600 constantly capacitor supplying the load current until the ITH voltage monitors the VIN pin for an overvoltage condition. When rises above the zero current level (0.8V) to initiate another VIN rises above 16V, the regulator suspends operation cycle. Discontinuous mode operation is disabled by tying by shutting off both power MOSFETs and discharges the the MODE pin to INTV ISET pin voltage to ground. Once VIN drops below 15V, the CC, which forces continuous syn- regulator immediately resumes normal switching operation chronous operation regardless of output load. by first charging up the ISET pin to its programmed voltage. The operating frequency is determined by the value of the RT resistor, which programs the current for the internal oscilla-
Programming Switching Frequency
tor as well as the current for the internal one-shot timer. An Connecting a resistor from the RT pin to GND programs internal phase-locked loop servos the switching regulator the switching frequency from 200kHz to 4MHz according on-time to track the internal oscillator to force constant to the following formula: switching frequency. If an external synchronization clock is present on the MODE/SYNC pin, the regulator on-time and 3.6 • 1010 (1/ F) switching frequency would then track the external clock. Frequency (Hz) = R T (Ω) Overvoltage and undervoltage comparators OV and UV pull the PGOOD output low if the output power good For ease of use, the RT pin can be connected directly to feedback voltage V the INTV PGFB exits a 7.5% window around the CC pin for 1MHz operation. Do not float the RT pin. regulation point. Continuous operation is forced during The internal on-time phase-locked loop has a synchroni- an OV condition. To defeat the PGOOD function, simply zation range of 30% around its programmed frequency. tie PGFB to INTVCC. Therefore, during external clock synchronization, the proper 3600fd 10 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts