Datasheet ADP2380 (Analog Devices)

20 V, 4 A Synchronous Step-Down Regulator with Low-Side Driver Data Sheet ADP2380 FEATURES TYPICAL APPLICATIONS CIRCUIT Input voltage: 4.5 V to 20 V VIN 1 16 Integrated 44 mΩ high-side MOSFET PVIN BST C L V C 2 15 BST OUT 0.6 V ± 1% reference voltage over temperature IN PVIN SW 3 14 C Continuous output current: 4 A UVLO OUT ADP2380 SW 4 13 FET Programmable switching frequency: 250 kHz to 1.4 MHz PGOOD LD 12 Synchronizes to external clock: 250 kHz to 1.4 MHz 5 RT VREG CVREG R 180° out-of-phase synchronization OSC 6 11 SYNC PGND Programmable UVLO 7 10 EN/SS GND RTOP Power-good output CSS 8 9 COMP FB External compensation RBOT Internal soft start with external adjustable option CC_EA RC_EA Startup into a precharged output
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Supported by ADIsimPower design tool CCP_EA
09939-
APPLICATIONS
Figure 1.
Communications infrastructure Networking and servers 100 Industrial and instrumentation 95 Healthcare and medical 90 Intermediate power rail conversion DC-to-dc point of load application 85 %) ( 80 NCY 75 E ICI F 70 F E 65 60 VOUT = 1.2V V 55 OUT = 3.3V VOUT = 5V 50 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
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OUTPUT CURRENT (A)
09939- Figure 2. Efficiency vs. Output Current, VIN = 12 V, fSW = 250 kHz
GENERAL DESCRIPTION
The ADP2380 is a current mode control, synchronous, step-down, External compensation and an adjustable soft start provide dc-to-dc regulator. It integrates a 44 mΩ high-side power MOSFET design flexibility. The power-good output provides simple and and a low-side driver to provide a high efficiency solution. The reliable power sequencing. Additional features include ADP2380 runs from an input voltage of 4.5 V to 20 V and can programmable undervoltage lockout (UVLO), overvoltage deliver 4 A of output current. The output voltage can be adjusted protection (OVP), overcurrent protection (OCP), and thermal to 0.6 V to 90% of the input voltage. The switching frequency of shutdown (TSD). the ADP2380 can be programmed from 250 kHz to 1.4 MHz or The ADP2380 operates over the −40°C to +125°C junction fixed at 290 kHz or 540 kHz. The synchronization function al ows temperature range and is available in a 16-lead TSSOP_EP the switching frequency to be synchronized to an external clock package. to minimize system noise.
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Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide