Datasheet ADP2165, ADP2166 (Analog Devices) - 3

Data Sheet ADP2165/ADP2166 FUNCTIONAL BLOCK DIAGRAM EN EN_BUF UVLO PVIN 1.2V ACS + HICCUP OCP MODE SLOPE RAMP I – MAX Σ VPVIN BST COMP 0.6V I + NFET1 SS + DRIVER SS + CMP AMP – TRK + SW FB – CLK 0.7V OVP CONTROL – LOGIC VPVIN NFET2 + 0.66V DRIVER – PGND + – NEG CURRENT 0.54V CMP + + – INEG PGOOD DEGLITCH AVIN EN_BUF 3.3V VREG REGULATOR CLK SYNC GND OSC SLOPE RAMP
8
RT
01 6- 095 1 Figure 3. ADP2165/ADP2166 Functional Block Diagram Rev. B | Page 3 of 23 Document Outline Features Applications General Description Typical Application Circuit Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode Enable/Shutdown Internal Regulator (VREG) Bootstrap Circuitry Oscillator and Synchronization Soft Start Tracking Power-Good (PGOOD) Peak Current-Limit and Short-Circuit Protection Overvoltage Protection Undervoltage Lockout Thermal Shutdown Applications Information ADIsimPower Design Tool Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Compensation Design Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Printed Circuit Board Layout Recommendations Reference Designs Outline Dimensions Ordering Guide