Datasheet ADP2390 (Analog Devices) - 7

Data Sheet ADP2389/ADP2390 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADP2389/ADP2390 TOP VIEW (Not to Scale) D O O NI NI T MI W G T N NI V V R LI P F E V P P 23 13 03 92 82 72 62 52 SS 1 24 PVIN COMP 2 23 PVIN 33 FB 3 GND 22 PVIN VREG 4 21 BST GND 5 20 SW SW 6 19 SW 34 SW 7 SW 18 PGND SW 8 17 PGND 9 01 11 21 31 41 51 61 W W W D D D D D S S S N N N N N G G G G G P P P P P NOTES 1. THE EXPOSED GND PAD MUST BE SOLDERED TO A LARGE, EXTERNAL, COPPER GND PLANE TO REDUCE THERMAL RESISTANCE. 2. THE EXPOSED SW PAD MUST BE CONNECTED TO THE SW PINS BY USING SHORT, WIDE TRACES, OR SOLDERED TO A LARGE, EXTERNAL,
-004
COPPER SW PLANE TO REDUCE THERMAL RESISTANCE.
2192 1 Figure 4. Pin Configuration (Top View)
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 SS Soft Start Control. Connect a capacitor from the SS pin to GND to program the soft start time. 2 COMP Error Amplifier Output. Connect an RC network from the COMP pin to GND. 3 FB Feedback Voltage Sense Input. Connect this pin to a resistor divider from the output voltage, VOUT. 4 VREG Output of the Internal 5 V Regulator. The control circuits are powered from this voltage. Place a 1 μF, X7R or X5R ceramic capacitor between this pin and GND. 5 GND Analog Ground. 6 to 11, 19, 20 SW Switch Node. Connect this pin to an inductor. 12 to 18 PGND Power Ground. Return of the low-side MOSFET. 21 BST Supply Rail for the High-Side Gate Drive. Place a 0.1 μF, X7R or X5R capacitor between SW and BST. 22 to 26 PVIN Power Input. Connect PVIN to the input power source and connect a bypass capacitor between this pin and PGND. 27 VIN Power Input for Control Circuitry. Bypass VIN to GND with a low equivalent series resistance (ESR) capacitor as close to the device as possible. Connect VIN to PVIN directly. 28 EN Precision Enable. Use an external resistor divider to set the turn on threshold. To enable the device automatically, connect the EN pin to PVIN. 29 FTW Fast Transient Response Window Setting. Connect a resistor between the FTW pin and GND to set the fast transient response window. 30 PGOOD Power-Good Output (Open-Drain). Connecting a 10 kΩ to 100 kΩ pull-up resistor from PGOOD to a pull-up voltage is recommended. 31 ILIM Current-Limit Threshold Setting. Connect a resistor from the ILIM pin to GND to program the current-limit threshold. 32 RT Frequency Setting. Connect a resistor between the RT pin and GND to program the switching frequency between 200 kHz to 2.2 MHz. 33 EP, GND Exposed GND Pad. The exposed GND pad must be soldered to a large, external, copper GND plane to reduce thermal resistance. 34 EP, SW Exposed SW Pad. The exposed SW pad must be connected to the SW pins by using short, wide traces, or soldered to a large, external, copper SW plane to reduce thermal resistance. Rev. 0 | Page 7 of 23 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL INFORMATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PFM MODE (ADP2390 ONLY) PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SOFT START FAST TRANSIENT RESPONSE POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING INPUT VOLTAGE UVLO COMPENSATION DESIGN DESIGN EXAMPLE OUTPUT VOLTAGE SETTING FREQUENCY SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION SCHEMATIC FOR DESIGN EXAMPLE EXTERNAL COMPONENTS RECOMMENDATION CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE