Datasheet ADP2443 (Analog Devices) - 4

HerstellerAnalog Devices
Beschreibung3 A, 36 V, Synchronous Step-Down DC-to-DC Regulator
Seiten / Seite24 / 4 — ADP2443. Data Sheet. SPECIFICATIONS. Table 1. Parameters. Symbol. Test …
Dateiformat / GrößePDF / 689 Kb
DokumentenspracheEnglisch

ADP2443. Data Sheet. SPECIFICATIONS. Table 1. Parameters. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

ADP2443 Data Sheet SPECIFICATIONS Table 1 Parameters Symbol Test Conditions/Comments Min Typ Max Unit

Modelllinie für dieses Datenblatt

Textversion des Dokuments

link to page 5 link to page 5
ADP2443 Data Sheet SPECIFICATIONS
VPVIN = 12 V, TJ = −40°C to +125°C for minimum/maximum specifications, TA = 25°C for typical specifications, unless otherwise noted.
Table 1. Parameters Symbol Test Conditions/Comments Min Typ Max Unit
PVIN PVIN Voltage Range VPVIN 4.5 36 V Quiescent Current IQ No switching, RAMP connected to PVIN 0.868 1.1 mA through a resistor Shutdown Current ISHDN EN = GND 28 57 µA PVIN Undervoltage Lockout Threshold PVIN rising 4.3 4.45 V PVIN falling 3.8 3.9 V FB Regulation Voltage VFB −40°C < TJ < +125°C 0.594 0.6 0.606 V Bias Current IFB 0.05 0.2 µA ERROR AMPLIFIER (EA) Transconductance gm 485 515 545 µS Source Current ISOURCE VFB = 0.45 V 50 µA Sink Current ISINK VFB = 0.75 V 50 µA INTERNAL REGULATOR (VREG) VREG Voltage VVREG VPVIN = 12 V, IVREG = 10 mA 4.9 5 5.1 V Dropout Voltage VPVIN = 12 V, IVREG = 30 mA 320 mV Regulator Current Limit 100 mA SW High-Side On Resistance1 RDSON_HS BST pin voltage (VBST) − VSW = 5 V 98 147 mΩ Low-Side On Resistance1 RDSON_LS VVREG = 5 V 35 58 mΩ Low-Side Valley Current Limit 3.9 4.7 5.1 A Low-Side Negative Current Limit 2 2.5 3 A Leakage Current VSW = 0 V, EN = GND 1.5 7.9 µA SW Minimum On Time tMIN_ON 50 65 ns SW Minimum Off Time tMIN_OFF 200 235 ns BST Bootstrap Voltage VBOOT 4.65 5 5.2 V OSCILLATOR (RT/SYNC) Switching Frequency fSW RT = 280 kΩ 540 600 660 kHz Switching Frequency Range 200 1800 kHz Synchronization Range 200 1800 kHz SYNC Minimum Pulse Width 100 ns SYNC Minimum Off Time 100 ns SYNC Input Voltage High 1.3 V Low 0.4 V SS SS Pin Pull-Up Current ISS 3.0 3.4 3.8 µA PGOOD Power-Good Range FB Rising Threshold 108 110 112 % FB Rising Hysteresis 5 % FB Falling Threshold 88 90 92 % FB Falling Hysteresis 5 % Power-Good Deglitch Time Both rising and falling 16 Clock cycles Power-Good Leakage Current VPGOOD = 5 V 0.1 1 µA Power-Good Output Low Voltage IPGOOD = 1 mA 220 300 mV Rev. 0 | Page 4 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SYNCHRONIZATION SOFT START POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING VOLTAGE CONVERSION LIMITATIONS INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING INPUT VOLTAGE UVLO SLOPE COMPENSATION SETTING COMPENSATION DESIGN ADIsimPOWER DESIGN TOOL DESIGN EXAMPLE OUTPUT VOLTAGE SETTING FREQUENCY SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION SLOPE COMPENSATION SETTING COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION RECOMMENDED EXTERNAL COMPONENTS PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE