Datasheet LT1189 (Analog Devices) - 8

HerstellerAnalog Devices
BeschreibungLow Power Video Difference Amplifier
Seiten / Seite12 / 8 — APPLICATI. S I FOR ATIO. Power Supply Bypassing. Calculating the Output …
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DokumentenspracheEnglisch

APPLICATI. S I FOR ATIO. Power Supply Bypassing. Calculating the Output Offset Voltage

APPLICATI S I FOR ATIO Power Supply Bypassing Calculating the Output Offset Voltage

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LT1189
O U U W U APPLICATI S I FOR ATIO
The primary use of the LT1189 is in converting high speed
Power Supply Bypassing
differential signals to a single-ended output. The LT1189 The LT1189 is quite tolerant of power supply bypassing. video difference amplifier has two uncommitted high input In some applications a 0.1µF ceramic disc capacitor impedance (+) and (–) inputs. The amplifier has another placed 1/2 inch from the amplifier is all that is required. In set of inputs which can be used for reference and feed- applications requiring good settling time, it is important to back. Additionally, this set of inputs give gain adjust, and use multiple bypass capacitors. A 0.1µF ceramic disc in DC control to the differential amplifier. The voltage gain of parallel with a 4.7µF tantalum is recommended. the LT1189 is set like a conventional operational amplifier. Feedback is applied to pin 8, and it is optimized for gains
Calculating the Output Offset Voltage
of 10 or greater. The amplifier can be operated single- ended by connecting either the (+) or (–) inputs to the Both input stages contribute to the output offset voltage at +/REF (pin 1). The voltage gain is set by the resistors: pin 6. The feedback correction forces balance in the input (RFB + RG)/RG. stages by introducing an Input VOS at pin 8. The complete expression for the output offset voltage is: Like the single-ended case, the differential voltage gain is set by the external resistors: (RFB + RG)/RG. The maximum VOUT = (VOS + IOS(RS) + IB(RREF)) × (RFB + RG)/RG + IB(RFB) input differential signal for which the output will respond R is approximately ±170mV. S represents the input source resistance, typically 75Ω, and RREF represents finite source impedance from the DC reference voltage, for VREF grounded, RREF = 0Ω the S/D S/D V + V + IOS is normally a small contributor and the expression 5 5 3 3 V 7 IN + 7 + simplifies to: 2 2 – 6 V LT1189 IN – 6 LT1189 1 OUT V 1 OUT V +/REF +/REF VOUT = VOS(RFB + RG)/RG + IB(RFB) 8 8 –/FB 4 –/FB 4 If R V – V – FB is limited to 1k, the last term of the equation RFB RFB contributes only 2mV since IB is less than 2µA. RFB + RG R RG RG A FB + V = + RG AV = – RG RG 7 V+ 6 S/D S/D V + V + 5 5 3 7 3 + 7 R V + FB IN DIFF 2 VIN DIFF 2 – LT1189 6 – LT1189 6 Q1 Q2 Q3 Q4 8 1 OUT V 1 OUT V IN V +/REF +/REF 8 RG 8 RG –/FB V 3 + 4 IN –/FB 4 2 – + 1 REF R R E E 300 300 V – V – R R R S S REF RFB RFB 345µA 350µA RFB + RG RFB +RG RFB V R O = (VIN DIFF + VIN) VO = – 4 V– G ( VIN DIFF ( VIN LT1189 • AI02 RG RG RG LT1189 • AI01
Figure 1. Simplified Input Stage Schematic
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